Datasheet > ADP1879ACPZ-0.3-R7

ADP1879ACPZ-0.3-R7

更新时间： 2024-01-22 12:47:48

品牌	Logo	应用领域
亚德诺 - ADI		开关光电二极管输出元件控制器
页数	文件大小	规格书
40页	2501K
描述
Synchronous Buck Controller

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技术参数
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ADP1879ACPZ-0.3-R7 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	End Of Life	零件包装代码：	SON
包装说明：	HVSON, SOLCC14,.12,20	针数：	14
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.64
其他特性：	ALSO AVAILABLE ADJUSTABLE OUTPUT DOWN TO 0.6V	模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	CURRENT-MODE	控制技术：	PULSE WIDTH MODULATION
最大输入电压：	20 V	最小输入电压：	2.95 V
标称输入电压：	12 V	JESD-30 代码：	R-PDSO-N14
JESD-609代码：	e3	长度：	4 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	14	最高工作温度：	125 °C
最低工作温度：	-40 °C	标称输出电压：	5 V
封装主体材料：	PLASTIC/EPOXY	封装代码：	HVSON
封装等效代码：	SOLCC14,.12,20	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	0.8 mm
子类别：	Switching Regulator or Controllers	表面贴装：	YES
切换器配置：	PUSH-PULL	最大切换频率：	300 kHz
技术：	MOS	温度等级：	AUTOMOTIVE
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	3 mm
Base Number Matches：	1

ADP1879ACPZ-0.3-R7 数据手册

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ADP1878/ADP1879

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADP1878/ADP1879

VIN

COMP

BST

DRVH

PGND

DRVL

PGOOD

GND

RES

VREG

TOP VIEW

(Not to Scale)

NOTES

1. CONNECT THE EXPOSED PAD TO THE

ANALOG GROUND PIN (GND).

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

No.

Mnemonic Description

VIN

High-Side Input Voltage. Connect VIN to the drain of the high-side MOSFET.

COMP

Output of the Error Amplifier. Connect compensation network between this pin and AGND to achieve stability (see

the Compensation Network section).

GND

IC Enable. Connect EN to VREG to enable the IC. When pulled down to AGND externally, EN disables the IC.

Noninverting Input of the Internal Error Amplifier. This is the node where the feedback resistor is connected.

Analog Ground Reference Pin of the IC. Connect all sensitive analog components to this ground plane (see the Layout

Considerations section).

RES

VREG

Current Sense Gain Resistor (External). Connect a resistor between the RES pin and GND (Pin 5).

Internal Regulator Supply Bias Voltage for the ADP1878/ADP1879 Controller (Includes the Output Gate Drivers).

Connecting a bypass capacitor of 1 μF directly from this pin to PGND and a 0.1 μF capacitor across VREG and GND are

recommended.

Soft Start Input. Connect an external capacitor to GND to program the soft start period. There is a capacitance value

of 10 nF for every 1 ms of soft start delay.

PGOOD

DRVL

Open-Drain Power-Good Output. PGOOD sinks current when FB is out of regulation or during thermal shutdown.

Connect a 3 kΩ resistor between PGOOD and VREG. Leave PGOOD unconnected if it is not used.

Drive Output for the External Low-Side, N-Channel MOSFET. This pin also serves as the current sense gain setting pin

(see Figure 69).

PGND

DRVH

Power Ground. Ground for the low-side gate driver and low-side N-channel MOSFET.

Drive Output for the External High-Side N-Channel MOSFET.

Switch Node Connection.

Bootstrap for the High-Side N-Channel MOSFET Gate Drive Circuitry. An internal boot rectifier (diode) is connected

between VREG and BST. A capacitor from BST to SW is required. An external Schottky diode can also be connected

between VREG and BST for increased gate drive capability.

BST

Exposed Pad. Connect the exposed pad to the analog ground pin (GND).

Rev. A | Page 6 of 40

1...3 4 567 8 9...40

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