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ADP1870-1.0-EVALZ

更新时间： 2022-12-26 19:44:17
品牌 Logo 应用领域
亚德诺 - ADI 控制器
页数 文件大小 规格书
44页 1932K
描述
Synchronous Buck Controller with Constant On-Time and Valley Current Mode

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ADP1870-1.0-EVALZ 数据手册

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ADP1870/ADP1871  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
ADP1870ARMZ-0.6/  
600  
kHz  
ADP1871ARMZ-0.6 (600 kHz)  
On-Time  
Minimum On-Time  
Minimum Off-Time  
VIN = 5 V, VOUT = 2 V, TJ = 25°C  
VIN = 20 V, VOUT = 0.8 V  
65% duty cycle (maximum)  
500  
540  
82  
340  
1.0  
580  
110  
400  
ns  
ns  
ns  
MHz  
ADP1870ARMZ-1.0/  
ADP1871ARMZ-1.0 (1.0 MHz)  
On-Time  
VIN = 5 V, VOUT = 2 V, TJ = 25°C  
VIN = 20 V  
45% duty cycle (maximum)  
285  
312  
60  
340  
340  
85  
400  
ns  
ns  
ns  
Minimum On-Time  
Minimum Off-Time  
OUTPUT DRIVER CHARACTERISTICS  
High-Side Driver  
Output Source Resistance  
Output Sink Resistance  
Rise Time2  
ISOURCE = 1.5 A, 100 ns, positive pulse (0 V to 5 V)  
ISINK = 1.5 A, 100 ns, negative pulse (5 V to 0 V)  
VBST − VSW = 4.4 V, CIN = 4.3 nF (see Figure 60)  
VBST − VSW = 4.4 V, CIN = 4.3 nF (see Figure 61)  
2.25  
0.7  
25  
3
1
Ω
Ω
ns  
ns  
tr,DRVH  
tf,DRVH  
Fall Time2  
11  
Low-Side Driver  
Output Source Resistance  
Output Sink Resistance  
Rise Time2  
ISOURCE = 1.5 A, 100 ns, positive pulse (0 V to 5 V)  
ISINK = 1.5 A, 100 ns, negative pulse (5 V to 0 V)  
VREG = 5.0 V, CIN = 4.3 nF (see Figure 61)  
1.6  
0.7  
18  
2.2  
1
Ω
Ω
ns  
ns  
tr,DRVL  
tf,DRVL  
Fall Time2  
VREG = 5.0 V, CIN = 4.3 nF (see Figure 60)  
16  
Propagation Delays  
DRVL Fall to DRVH Rise2  
DRVH Fall to DRVL Rise2  
SW Leakage Current  
Integrated Rectifier  
Channel Impedance  
PRECISION ENABLE THRESHOLD  
Logic High Level  
ttpdhDRVH  
ttpdhDRVL  
ISWLEAK  
VBST − VSW = 4.4 V (see Figure 60)  
VBST − VSW = 4.4 V (see Figure 61)  
VBST = 25 V, VSW = 20 V, VREG = 5 V  
15.4  
18  
ns  
ns  
μA  
110  
330  
ISINK = 10 mA  
22  
Ω
VIN = 2.9 V to 20 V, VREG = 2.75 V to 5.5 V  
VIN = 2.9 V to 20 V, VREG = 2.75 V to 5.5 V  
245  
285  
37  
mV  
mV  
Enable Hysteresis  
COMP VOLTAGE  
COMP Clamp Low Voltage  
VCOMP(low)  
From disabled state, release COMP/EN pin to enable 0.47  
device (2.75 V ≤ VREG ≤ 5.5 V)  
V
COMP Clamp High Voltage  
COMP Zero Current Threshold  
THERMAL SHUTDOWN  
VCOMP(high)  
VCOMP_ZCT  
TTMSD  
(2.75 V ≤ VREG ≤ 5.5 V)  
(2.75 V ≤ VREG ≤ 5.5 V)  
2.55  
V
V
1.07  
Thermal Shutdown Threshold  
Thermal Shutdown Hysteresis  
Hiccup Current Limit Timing  
Rising temperature  
155  
15  
6
°C  
°C  
ms  
1 The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure 60 and Figure 61), CGATE = 4.3 nF, and the upper- and lower-side  
MOSFETs being Infineon BSC042N03MSG.  
2 Not automatic test equipment (ATE) tested.  
Rev. 0 | Page 4 of 44  
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