1 A, Low VIN, Low Noise,
CMOS Linear Regulator
ADP1761
Data Sheet
FEATURES
TYPICAL APPLICATION CIRCUITS
ADP1761
1 A maximum output current
Low input voltage supply range
V
= 1.5V
C
OUT
V
= 1.7V
OUT
IN
VIN
VOUT
SENSE
EN
C
10µF
IN
10µF
VIN = 1.10 V to 1.98 V, no external bias supply required
R
ON
PULL-UP
Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V
Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V
Ultralow noise: 2 μV rms, 100 Hz to 100 kHz
Noise spectral density
100kΩ
OFF
PG
PG
SS
VADJ
C
SS
10nF
VREG
REFCAP
C
C
1µF
REF
1µF
GND
REG
4 nV/√Hz at 10 kHz
3 nV/√Hz at 100 kHz
Figure 1. Fixed Output Operation
Low dropout voltage: 30 mV typical at 1 A load
Operating supply current: 4.5 mA typical at no load
1.5ꢀ fixed output voltage accuracy over line, load, and
temperature
Excellent power supply rejection ratio (PSRR) performance
67 dB typical at 10 kHz at 1 A load
ADP1761
V
IN
= 1.7V
R
V
= 1.5V
OUT
VIN
VOUT
C
C
OUT
10µF
IN
10µF
SENSE
ON
PULL-UP
100kΩ
EN
OFF
PG
PG
SS
VADJ
51 dB typical at 100 kHz at 1 A load
Excellent load/line transient response
Soft start to reduce inrush current
Optimized for small 10 μF ceramic capacitors
Current-limit and thermal overload protection
Power-good indicator
C
R
VREG
REFCAP
SS
10nF
ADJ
10kΩ
C
1µF
C
REF
REG
1µF
GND
Figure 2. Adjustable Output Operation
Table 1. Related Devices
Precision enable
16-lead, 3 mm × 3 mm LFCSP package
Input
Maximum Fixed/
Device
Voltage Current
Adjustable
Package
APPLICATIONS
ADP1762 1.10 V to 2 A
1.98 V
ADP1763
Fixed/adjustable 16-lead
LFCSP
Fixed/adjustable 16-lead
LFCSP
Fixed/adjustable 16-lead
LFCSP
Fixed/adjustable 16-lead
LFCSP
Regulation to noise sensitive applications such as radio
frequency (RF) transceivers, analog-to-digital converter
(ADC) and digital-to-analog converter (DAC) circuits,
phase-locked loops (PLLs), voltage controlled oscillators
(VCOs) and clocking integrated circuits
Field-programmable gate array (FPGA) and digital signal
processor (DSP) supplies
Medical and healthcare
1.10 V to 3 A
1.98 V
ADP1740/ 1.6 V to 2 A
ADP1741 3.6 V
ADP1752/ 1.6 V to 0.8 A
ADP1753 3.6 V
ADP1754/ 1.6 V to 1.2 A
ADP1755 3.6 V
Fixed/adjustable 16-lead
LFCSP
Industrial and instrumentation
The ADP1761 is optimized for stable operation with small 10 μF
ceramic output capacitors. The ADP1761 delivers optimal transient
performance with minimal board area.
GENERAL DESCRIPTION
The ADP1761 is a low noise, low dropout (LDO) linear regulator. It
is designed to operate from a single input supply with an input
voltage as low as 1.10 V, without the requirement of an external
bias supply to increase efficiency and provide up to 1 A of
output current.
The ADP1761 is available in fixed output voltages ranging from
0.9 V to 1.5 V. The output of the adjustable output model can be
set from 0.5 V to 1.5 V through an external resistor connected
between VADJ and ground.
The low 30 mV typical dropout voltage at a 1 A load allows the
ADP1761 to operate with a small headroom while maintaining
regulation and providing better efficiency.
The ADP1761 has an externally programmable soft start time by
connecting a capacitor to the SS pin. Short-circuit and thermal
overload protection circuits prevent damage in adverse conditions.
The ADP1761 is available in a small 16-lead LFCSP package for the
smallest footprint solution to meet a variety of applications.
Rev. 0
Document Feedback
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Trademarks and registeredtrademarks arethe property of their respective owners.
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Tel: 781.329.4700
Technical Support
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www.analog.com
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