3 A, Low VIN, Low Noise,
CMOS Linear Regulator
ADP1763
Data Sheet
FEATURES
TYPICAL APPLICATION CIRCUITS
3 A maximum output current
Low input voltage supply range
ADP1763
V
= 1.5V
V
= 1.8V
OUT
IN
VIN
VOUT
SENSE
EN
C
10µF
C
OUT
10µF
IN
VIN = 1.10 V to 1.98 V, no external bias supply required
R
ON
PULL-UP
Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V
Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V
Ultralow noise: 2 μV rms, 100 Hz to 100 kHz
Noise spectral density
100kΩ
OFF
PG
PG
SS
VADJ
C
SS
VREG
REFCAP
10nF
C
C
1µF
REF
1µF
GND
REG
4 nV/√Hz at 10 kHz
3 nV/√Hz at 100 kHz
Figure 1. Fixed Output Operation
Low dropout voltage: 95 mV typical at 3 A load
Operating supply current: 4.5 mA typical at no load
1.5ꢀ fixed output voltage accuracy over line, load, and
temperature
Excellent power supply rejection ratio (PSRR) performance
59 dB typical at 10 kHz at 3 A load
43 dB typical at 100 kHz at 3 A load
Excellent load/line transient response
Soft start to reduce inrush current
Optimized for small 10 μF ceramic capacitors
Current-limit and thermal overload protection
Power-good indicator
ADP1763
V
= 1.8V
R
V
= 1.5V
C
OUT
IN
OUT
VIN
VOUT
C
10µF
IN
10µF
SENSE
ON
PULL-UP
100kΩ
EN
OFF
PG
PG
SS
VADJ
C
R
VREG
REFCAP
SS
ADJ
10nF
10kΩ
C
C
REF
REG
1µF
GND
1µF
Figure 2. Adjustable Output Operation
Precision enable
16-lead, 3 mm × 3 mm LFCSP package
APPLICATIONS
Table 1. Related Devices
Input
Voltage Current
Maximum Fixed/
Regulation to noise sensitive applications such as radio
frequency (RF) transceivers, analog-to-digital converter
(ADC) and digital-to-analog converter (DAC) circuits,
phase-locked loops (PLLs), voltage controlled oscillators
(VCOs) and clocking integrated circuits
Field-programmable gate array (FPGA) and digital signal
processor (DSP) supplies
Medical and healthcare
Device
Adjustable
Package
ADP1761 1.10 V to 1 A
1.98 V
ADP1762 1.10 V to 2 A
1.98 V
ADP1740/ 1.6 V to
ADP1741 3.6 V
ADP1752/ 1.6 V to
ADP1753 3.6 V
Fixed/adjustable 16-lead
LFCSP
Fixed/adjustable 16-lead
LFCSP
2 A
Fixed/adjustable 16-lead
LFCSP
0.8 A
1.2 A
Fixed/adjustable 16-lead
LFCSP
Fixed/adjustable 16-lead
LFCSP
Industrial and instrumentation
ADP1754/ 1.6 V to
ADP1755 3.6 V
GENERAL DESCRIPTION
The ADP1763 is a low noise, low dropout (LDO) linear regulator. It
is designed to operate from a single input supply with an input
voltage as low as 1.10 V without the requirement of an external bias
supply to increase efficiency and provide up to 3 A of output current.
The ADP1763 is available in fixed output voltages ranging from
0.9 V to 1.5 V. The output of the adjustable output model can be
set from 0.5 V to 1.5 V through an external resistor connected
between VADJ and ground.
The low 95 mV typical dropout voltage at a 3 A load allows the
ADP1763 to operate with a small headroom while maintaining
regulation and providing better efficiency.
The ADP1763 has an externally programmable soft start time by
connecting a capacitor to the SS pin. Short-circuit and thermal
overload protection circuits prevent damage in adverse conditions.
The ADP1763 is available in a small 16-lead LFCSP package for the
smallest footprint solution to meet a variety of applications.
The ADP1763 is optimized for stable operation with small 10 μF
ceramic output capacitors. The ADP1763 delivers optimal
transient performance with minimal board area.
Rev. 0
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Technical Support
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www.analog.com
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