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ADP1753ACPZ-R7 PDF预览

ADP1753ACPZ-R7

更新时间: 2024-01-19 12:21:57
品牌 Logo 应用领域
亚德诺 - ADI 线性稳压器IC调节器电源电路输出元件
页数 文件大小 规格书
20页 703K
描述
0.8 A, Low VIN, Low Dropout Linear Regulator

ADP1753ACPZ-R7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC16,.16SQ,25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.22
可调性:ADJUSTABLE最大回动电压 1:0.14 V
JESD-30 代码:S-XQCC-N16JESD-609代码:e3
长度:4 mm最大负载调整率 (%):2%
湿度敏感等级:3功能数量:1
输出次数:1端子数量:16
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最大输出电流 1:0.8 A最大输出电压 1:3 V
最小输出电压 1:0.75 V封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC16,.16SQ,25
封装形状:SQUARE封装形式:CHIP CARRIER
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
认证状态:Not Qualified调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:1 mm子类别:Other Regulators
表面贴装:YES技术:CMOS
端子面层:MATTE TIN端子形式:NO LEAD
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:4 mm
Base Number Matches:1

ADP1753ACPZ-R7 数据手册

 浏览型号ADP1753ACPZ-R7的Datasheet PDF文件第1页浏览型号ADP1753ACPZ-R7的Datasheet PDF文件第2页浏览型号ADP1753ACPZ-R7的Datasheet PDF文件第3页浏览型号ADP1753ACPZ-R7的Datasheet PDF文件第5页浏览型号ADP1753ACPZ-R7的Datasheet PDF文件第6页浏览型号ADP1753ACPZ-R7的Datasheet PDF文件第7页 
ADP1752/ADP1753  
Data Sheet  
Parameter  
Symbol  
Test Conditions/Comments  
10 Hz to 100 kHz, VOUT = 0.75 V  
10 Hz to 100 kHz, VOUT = 2.5 V  
VIN = VOUT + 1 V, IOUT = 10 mA  
1 kHz, VOUT = 0.75 V  
1 kHz, VOUT = 2.5 V  
10 kHz, VOUT = 0.75 V  
10 kHz, VOUT = 2.5 V  
100 kHz, VOUT = 0.75 V  
100 kHz, VOUT = 2.5 V  
Min  
Typ Max  
Unit  
OUTPUT NOISE  
OUTNOISE  
23  
65  
µV rms  
µV rms  
POWER SUPPLY REJECTION RATIO  
PSRR  
65  
56  
65  
56  
54  
51  
dB  
dB  
dB  
dB  
dB  
dB  
1 Minimum output load current is 500 μA.  
2 Accuracy when VOUT is connected directly to ADJ. When VOUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the  
tolerances of resistors used.  
3 Based on an end-point calculation using 10 mA and 0.8 A loads. See Figure 6 for typical load regulation performance.  
4 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only to output voltages  
above 1.6 V.  
5 Start-up time is defined as the time between the rising edge of EN to VOUT being at 95% of its nominal value.  
6 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V  
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.  
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS  
Table 2.  
Parameter  
Symbol  
CMIN  
Test Conditions/Comments  
TA = −40°C to +125°C  
Min  
3.3  
Typ  
Max  
Unit  
µF  
MINIMUM INPUT AND OUTPUT CAPACITANCE1  
CAPACITOR ESR  
RESR  
TA = −40°C to +125°C  
0.001  
0.1  
1 The minimum input and output capacitance should be greater than 3.3 µF over the full range of operating conditions. The full range of operating conditions in the  
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;  
Y5V and Z5U capacitors are not recommended for use with this LDO.  
Rev. E | Page 4 of 20  
 
 
 

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