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ADP151AUJZ-2.5-R7 PDF预览

ADP151AUJZ-2.5-R7

更新时间： 2024-01-10 20:22:02
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 光电二极管
页数 文件大小 规格书
25页 1494K
描述
2.5 V FIXED POSITIVE LDO REGULATOR, 0.23 V DROPOUT, PDSO5, ROHS COMPLIANT, MO-193AB, TSOT-5

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ADP151AUJZ-2.5-R7 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSOT
包装说明：VSSOP,针数：5
Reach Compliance Code：unknown风险等级：5.66
Is Samacsys：N最大回动电压 1：0.23 V
最大输入电压：5.5 V最小输入电压：2.2 V
JESD-30 代码：R-PDSO-G5JESD-609代码：e3
长度：2.9 mm湿度敏感等级：NOT APPLICABLE
功能数量：1端子数量：5
工作温度TJ-Max：125 °C工作温度TJ-Min：-40 °C
最大输出电流 1：0.2 A最大输出电压 1：2.5375 V
最小输出电压 1：2.4375 V标称输出电压 1：2.5 V
封装主体材料：PLASTIC/EPOXY封装代码：VSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260调节器类型：FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度：1 mm表面贴装：YES
技术：CMOS端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.95 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：1.6 mmBase Number Matches：1

ADP151AUJZ-2.5-R7 数据手册

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Data Sheet  
ADP151  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
on PCB material, layout, and environmental conditions. The  
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit  
board. See JESD51-7 and JESD51-9 for detailed information  
on the board construction. For additional information, see the  
AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale  
Package, available at www.analog.com.  
Parameter  
Rating  
VIN to GND  
VOUT to GND  
−0.3 V to +6.5 V  
−0.3 V to VIN  
EN to GND  
−0.3 V to +6.5V  
−65°C to +150°C  
−40°C to +125°C  
−40°C to +125°C  
JEDEC J-STD-020  
Storage Temperature Range  
Operating Junction Temperature Range  
Operating Ambient Temperature Range  
Soldering Conditions  
ΨJB is the junction-to-board thermal characterization parameter  
with units of °C/W. ΨJB of the package is based on modeling and  
calculation using a 4-layer board. The JESD51-12, Guidelines for  
Reporting and Using Electronic Package Thermal Information, states  
that thermal characterization parameters are not the same as  
thermal resistances. ΨJB measures the component power flowing  
through multiple thermal paths rather than a single path as in  
thermal resistance, θJB. Therefore, ΨJB thermal paths include  
convection from the top of the package as well as radiation from  
the package, factors that make ΨJB more useful in real-world  
applications. Maximum junction temperature (TJ) is calculated  
from the board temperature (TB) and power dissipation (PD)  
using the formula  
Stresses above those listed under absolute maximum ratings  
may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device at these or  
any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
THERMAL DATA  
Absolute maximum ratings apply individually only, not in  
combination. The ADP151 can be damaged when the junction  
temperature limits are exceeded. Monitoring ambient temperature  
does not guarantee that TJ is within the specified temperature  
limits. In applications with high power dissipation and poor  
thermal resistance, the maximum ambient temperature may  
have to be derated.  
TJ = TB + (PD × ΨJB)  
See JESD51-8 and JESD51-12 for more detailed information  
about ΨJB.  
THERMAL RESISTANCE  
θJA and ΨJB are specified for the worst-case conditions, that is, a  
device soldered in a circuit board for surface-mount packages.  
In applications with moderate power dissipation and low PCB  
thermal resistance, the maximum ambient temperature can  
exceed the maximum limit as long as the junction temperature  
is within specification limits. The junction temperature (TJ) of  
the device is dependent on the ambient temperature (TA), the  
power dissipation of the device (PD), and the junction-to-ambient  
thermal resistance of the package (θJA).  
Table 4. Thermal Resistance  
Package Type  
θJA  
ΨJB  
43  
58  
Unit  
°C/W  
°C/W  
°C/W  
5-Lead TSOT  
4-Ball, 0.4 mm Pitch WLCSP  
6-Lead 2 mm × 2 mm LFCSP  
170  
260  
63.6  
28.3  
The maximum junction temperature (TJ) is calculated from the  
ambient temperature (TA) and power dissipation (PD) using the  
formula  
ESD CAUTION  
TJ = TA + (PD × θJA)  
The junction-to-ambient thermal resistance (θJA) of the package  
is based on modeling and calculation using a 4-layer board. The  
junction-to-ambient thermal resistance is highly dependent  
on the application and board layout. In applications where high  
maximum power dissipation exists, close attention to thermal  
board design is required. The value of θJA may vary, depending  
Rev. E | Page 5 of 24  
 
 
 
 
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