Datasheet > ADP120-12-EVALZ

ADP120-12-EVALZ

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
亚德诺 - ADI		稳压器
页数	文件大小	规格书
20页	539K
描述
100 mA, Low Quiescent Current, CMOS Linear Regulator

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ADP120-12-EVALZ 数据手册

ADP120

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

VIN

GND

VOUT

VIN

VOUT

TOP VIEW

(Not to Scale)

TOP VIEW

(Not to Scale)

GND

NC = NO CONNECT

Figure 3. 5-Lead TSOT Pin Configuration

Figure 4. 4-Ball WLCSP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

TSOT WLCSP Mnemonic Description

VIN

GND

Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.

Ground.

Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic

startup, connect EN to VIN.

N/A

VOUT

No Connect. Not connected internally. Not applicable (N/A) for the WLCSP.

Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.

Rev. A | Page 6 of 20

1...3 4 567 8 9...20

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