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ADP120-1-ACBZ25R7 PDF预览

ADP120-1-ACBZ25R7

更新时间: 2024-01-21 16:23:55
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 613K
描述
IC,VOLT REGULATOR,FIXED,+2.5V,CMOS,BGA,4PIN,PLASTIC

ADP120-1-ACBZ25R7 数据手册

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ADP120  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
Junction-to-ambient thermal resistance (θJA) of the package is  
based on modeling and calculation using a four-layer board.  
The junction-to-ambient thermal resistance is highly dependent  
on the application and board layout. In applications where high  
maximum power dissipation exists, close attention to thermal  
board design is required. The value of θJA may vary, depending on  
PCB material, layout, and environmental conditions. Specified  
value of θJA is based on a four-layer, 4 in. × 3 in., 2 1/2 oz.  
copper board, as per JEDEC standards. For more information,  
see Application Note AN-772, A Design and Manufacturing  
Guide for the Lead Frame Chip Scale Package (LFCSP).  
Parameter  
Rating  
VIN to GND  
VOUT to GND  
−0.3 V to +6 V  
−0.3 V to VIN  
EN to GND  
−0.3 V to +6 V  
−65°C to +150°C  
−40°C to +125°C  
JEDEC J-STD-020  
Storage Temperature Range  
Operating Junction Temperature Range  
Soldering Conditions  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
ΨJB is the junction-to-board thermal characterization parameter  
with units of °C/W. ΨJB of the package is based on modeling and  
calculation using a four-layer board. The JESD51-12, Guidelines  
for Reporting and Using Package Thermal Information, states  
that thermal characterization parameters are not the same as  
thermal resistances. ΨJB measures the component power flowing  
through multiple thermal paths rather than a single path as in  
thermal resistance, θJB. Therefore, ΨJB thermal paths include  
convection from the top of the package as well as radiation from  
the package, factors that make ΨJB more useful in real-world  
applications. Maximum junction temperature (TJ) is calculated  
from the board temperature (TB) and power dissipation (PD)  
using the formula  
THERMAL DATA  
Absolute maximum ratings apply individually only, not in  
combination. The ADP120 and ADP120-1 can be damaged  
when the junction temperature limits are exceeded. Monitoring  
ambient temperature does not guarantee that TJ is within the  
specified temperature limits. In applications with high power  
dissipation and poor thermal resistance, the maximum ambient  
temperature may have to be derated.  
TJ = TB + (PD × ΨJB)  
In applications with moderate power dissipation and low PCB  
thermal resistance, the maximum ambient temperature can  
exceed the maximum limit as long as the junction temperature  
is within specification limits. The junction temperature (TJ) of  
the device is dependent on the ambient temperature (TA), the  
power dissipation of the device (PD), and the junction-to-ambient  
thermal resistance of the package (θJA).  
Refer to JESD51-8 and JESD51-12 for more detailed informa-  
tion about ΨJB.  
THERMAL RESISTANCE  
θJA and ΨJB are specified for the worst-case conditions, that is, a  
device soldered in a circuit board for surface-mount packages.  
Maximum junction temperature (TJ) is calculated from the  
ambient temperature (TA) and power dissipation (PD) using the  
formula  
Table 4. Thermal Resistance  
Package Type  
θJA  
ΨJB  
43  
58  
Unit  
°C/W  
°C/W  
5-Lead TSOT  
4-Ball, 0.4 mm Pitch WLCSP  
170  
260  
TJ = TA + (PD × θJA)  
ESD CAUTION  
Rev. 0 | Page 5 of 20  
 

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