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ADMC326YN-XXX-YY

更新时间： 2024-01-29 02:24:53
品牌 Logo 应用领域
其他 - ETC 外围集成电路光电二极管电动机控制电机控制器时钟
页数 文件大小 规格书
32页 237K
描述
MOTOR CONTROLLER

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ADMC326YN-XXX-YY 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOIC-28
针数：28Reach Compliance Code：not_compliant
风险等级：5.92Is Samacsys：N
地址总线宽度：桶式移位器：YES
边界扫描：NO最大时钟频率：10 MHz
外部数据总线宽度：格式：FIXED POINT
内部总线架构：MULTIPLEJESD-30 代码：R-PDSO-G28
JESD-609代码：e0长度：17.9 mm
低功率模式：NO端子数量：28
最高工作温度：105 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：220认证状态：Not Qualified
座面最大高度：2.65 mm最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：7.5 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：1

ADMC326YN-XXX-YY 数据手册

 浏览型号ADMC326YN-XXX-YY的Datasheet PDF文件第4页浏览型号ADMC326YN-XXX-YY的Datasheet PDF文件第5页浏览型号ADMC326YN-XXX-YY的Datasheet PDF文件第6页浏览型号ADMC326YN-XXX-YY的Datasheet PDF文件第8页浏览型号ADMC326YN-XXX-YY的Datasheet PDF文件第9页浏览型号ADMC326YN-XXX-YY的Datasheet PDF文件第10页 
ADMC326  
GENERAL DESCRIPTION  
The ADMC326 provides 512 × 24-bit program memory RAM,  
4K × 24-bit program memory ROM and 512 × 16-bit data  
memory RAM. The program memory ROM contains the user-  
specified program code and is defined using a single metal layer  
mask. The program and data memory RAM can be used for  
dynamic data storage.  
The ADMC326 is a low cost, single-chip DSP-based controller,  
suitable for permanent magnet synchronous motors, AC induction  
motors and brushless dc motors. The ADMC326 integrates a  
20 MIPS, fixed-point DSP core with a complete set of motor  
control and system peripherals that permits fast, efficient  
development of motor controllers.  
The motor control peripherals of the ADMC326 comprise a  
12-bit analog data acquisition system with six analog input  
channels and an internal voltage reference. In addition, a three-  
phase, 16-bit, center-based PWM generation unit can be used to  
produce high accuracy PWM signals with minimal processor  
overhead. The ADMC326 also contains two auxiliary PWM  
outputs, and nine lines of digital I/O.  
The DSP core of the ADMC326 is the ADSP-2171, which is  
completely code compatible with the ADSP-21xx DSP family  
and combines three computational units, data address generators  
and a program sequencer. The computational units comprise an  
ALU, a multiplier/accumulator (MAC) and a barrel shifter. The  
ADSP-2171 adds new instructions for bit manipulation, multipli-  
cation (× squared), biased rounding and global interrupt masking.  
Because the ADMC326 has a limited number of pins, a number  
of functions such as the auxiliary PWM and the serial commu-  
nication port are multiplexed with the nine programmable input/  
output (PIO) pins. The pin functions can be independently  
selected to allow maximum flexibility for different applications.  
The system peripherals are the power-on reset circuit (POR),  
the watchdog timer and a synchronous serial port. The serial  
port is configurable and double buffered, with hardware support  
for UART and SCI port emulation.  
INSTRUCTION  
REGISTER  
PM ROM  
4K ꢀ 24  
DM RAM  
512 ꢀ 16  
DATA  
ADDRESS  
GENERATOR  
#2  
DATA  
ADDRESS  
GENERATOR  
#1  
PM RAM  
512 ꢀ 24  
PROGRAM  
SEQUENCER  
14  
14  
PMA BUS  
DMA BUS  
PMD BUS  
DMD BUS  
24  
BUS  
EXCHANGE  
16  
CONTROL  
TIMER  
INPUT REGS  
ALU  
INPUT REGS  
INPUT REGS  
SHIFTER  
LOGIC  
MAC  
TRANSMIT REG  
COMPANDING  
CIRCUITRY  
RECEIVE REG  
OUTPUT REGS  
OUTPUT REGS  
OUTPUT REGS  
16  
SERIAL  
PORT  
R BUS  
6
Figure 3. DSP Core Block Diagram  
REV. C  
–7–  
1...45678910...32

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