Datasheet > 电源电路 > 线性稳压器IC> ADM7160ACPZN2.5-R7

ADM7160ACPZN2.5-R7

更新时间： 2024-01-19 04:58:48

品牌	Logo	应用领域
亚德诺 - ADI		线性稳压器IC 调节器电源电路光电二极管输出元件
页数	文件大小	规格书
24页	844K
描述
Ultralow Noise, 200 mA Linear Regulator

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ADM7160ACPZN2.5-R7 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	针数：	6
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.64
Is Samacsys：	N	可调性：	FIXED
标称回动电压 1：	0.15 V	最大绝对输入电压：	6.5 V
JESD-30 代码：	R-PDSO-N6	JESD-609代码：	e4
最大电网调整率：	0.00325%	最大负载调整率：	0.04%
湿度敏感等级：	1	输出次数：	1
端子数量：	6	工作温度TJ-Max：	125 °C
工作温度TJ-Min：	-40 °C	最大输出电流 1：	0.2 A
标称输出电压 1：	2.5 V	封装主体材料：	PLASTIC/EPOXY
封装代码：	SON	封装等效代码：	SOLCC6,.08,25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
包装方法：	TAPE AND REEL	认证状态：	Not Qualified
调节器类型：	FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR	子类别：	Other Regulators
表面贴装：	YES	技术：	CMOS
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	NO LEAD
端子节距：	0.635 mm	端子位置：	DUAL
最大电压容差：	1.5%	Base Number Matches：	1

ADM7160ACPZN2.5-R7 数据手册

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Data Sheet

ADM7160

ABSOLUTE MAXIMUM RATINGS

Table 3.

The specified values of θ_JAare based on a 4-layer, 4 inch × 3 inch

printed circuit board (PCB). See JEDEC JESD51-7 and JESD51-9

for detailed information about board construction. For more infor-

mation about the LFCSP package, see the AN-772 Application

Note, A Design and Manufacturing Guide for the Lead Frame Chip

Scale Package (LFCSP).

Parameter

Rating

VIN to GND

VOUT to GND

EN to GND

−0.3 V to +6.5 V

−0.3 V to VIN

−0.3 V to +6.5 V

−65°C to +150°C

Storage Temperature Range

Operating Junction Temperature Range −40°C to +125°C

Operating Ambient Temperature Range −40°C to +125°C

_JBis the junction-to-board thermal characterization parameter

with units of °C/W. Ψ_JBof the package is based on modeling and

calculation using a 4-layer board.

Soldering Conditions

JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

JEDEC JESD51-12, Guidelines for Reporting and Using Electronic

Package Thermal Information, states that thermal characterization

parameters are not the same as thermal resistances. Ψ_JBmeasures

the component power flowing through multiple thermal paths,

rather than through a single path as in thermal resistance (θ_JB).

Therefore, Ψ_JBthermal paths include convection from the top of

the package, as well as radiation from the package, factors that

make Ψ_JBmore useful in real-world applications.

THERMAL DATA

Maximum junction temperature (T_J) is calculated from the

board temperature (T_B) and the power dissipation (P_D) using

the following formula:

Absolute maximum ratings apply individually only, not in

combination. The ADM7160 can be damaged when the junc-

tion temperature limits are exceeded. Monitoring ambient

temperature does not guarantee that T_Jis within the specified

temperature limits.

T_J= T_B+ (P_D× Ψ_JB)

See JEDEC JESD51-8 and JESD51-12 for more detailed infor-

mation about Ψ_JB.

In applications with high power dissipation and poor PCB

thermal resistance, the maximum ambient temperature may

need to be derated. In applications with moderate power

dissipation and low PCB thermal resistance, the maximum

ambient temperature can exceed the maximum limit as long

as the junction temperature is within the specification limits.

THERMAL RESISTANCE

θ_JAand Ψ_JBare specified for the worst-case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

The junction temperature (T_J) of the device is dependent on the

ambient temperature (T_A), the power dissipation of the device

(P_D), and the junction-to-ambient thermal resistance of the

package (θ_JA). T_Jis calculated using the following formula:

Package Type

5-Lead TSOT

6-Lead LFCSP

θ_JA

Ψ_JB

28.3

Unit

°C/W

170

63.6

T_J= T_A+ (P_D× θ_JA)

ESD CAUTION

The junction-to-ambient thermal resistance (θ_JA) of the package

is based on modeling and calculation using a 4-layer board. θ_JA

is highly dependent on the application and board layout. In appli-

cations where high maximum power dissipation exists, close

attention to thermal board design is required. The value of θ_JA

may vary, depending on PCB material, layout, and environmental

conditions.

Rev. 0 | Page 5 of 24

1 2 3 456 7 8...24

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