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ADM699AR PDF预览

ADM699AR

更新时间: 2024-01-19 22:32:00
品牌 Logo 应用领域
亚德诺 - ADI 微处理器监控
页数 文件大小 规格书
4页 257K
描述
Microprocessor Supervisory Circuits

ADM699AR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:CERDIP-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.77可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-GDIP-T8
JESD-609代码:e0信道数量:1
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 V认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Power Management Circuits
最大供电电流 (Isup):1.95 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
阈值电压标称:+4.65V处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

ADM699AR 数据手册

 浏览型号ADM699AR的Datasheet PDF文件第1页浏览型号ADM699AR的Datasheet PDF文件第2页浏览型号ADM699AR的Datasheet PDF文件第3页 
ADM698/ADM699  
CIRCUIT INFORMATION  
Power Fail RESET  
A precision voltage detector monitors VCC and generates a  
RESET output to hold the microprocessor’s Reset line low when  
Watchdog Timer (ADM699 Only)  
The watchdog timer input (WDI) monitors an I/O line from the  
µP system. The µP must toggle this input once every 1.6 sec-  
onds to verify correct software execution. Failure to toggle the  
line indicates that the µP system is not correctly executing its  
program and may be tied up in an endless loop. If this happens,  
a reset pulse is generated to initialize the processor.  
V
CC falls below the reset threshold (4.65 V) (see Figure 4). The  
reset voltage threshold is set to accommodate a 5% variation on  
CC. The voltage detector has 40 mV hysteresis to ensure that  
V
glitches on VCC do not activate the RESET output.  
The WDI input is a three level input and will recognize a low  
to- high or a high-to-low transition on its input. The watchdog  
timer is reset by each WDI transition and then begins its  
timeout period. If the WDI pin remains either high or low, reset  
pulses will be issued every 1.6 seconds typically. If the watch-  
dog timer is not needed, the WDI input should be left floating.  
On power up, an internal monostable holds RESET low for  
140 ms after VCC rises above the reset threshold. This allows the  
power supply to stabilize on power up and also prevents re-  
peated toggling of RESET even if the 5 V power drops out and  
recovers with each power line cycle. In order to prevent  
mistriggering due to transient voltage spikes, it is recommended  
that a 0.1 µF capacitor be connected at the VCC pin.  
The Watchdog Output (WDO) (SOIC package Only) provides  
watchdog status information. It is driven low if WDI is not  
toggled within the watchdog timeout period. It goes high at the  
next WDI transition. It is also set high when VCC falls below the  
reset threshold.  
The RESET output is guaranteed to remain low with VCC as  
low as 1 V. This holds the microprocessor in a stable shutdown  
condition as the power supply comes up.  
On the 16-lead SOIC package, an active high RESET output is  
also provided. This is the complement of RESET and is in-  
tended for microprocessors requiring an active high signal.  
WDI  
V
V
V
2
2
CC  
V
V
1
1
WDO  
t
t
2
2
RESET  
t1  
t1  
RESET  
t
t
t
1
1
1
V
= RESET VOLTAGE THRESHOLD  
= RESET VOLTAGE THRESHOLD +  
THRESHOLD HYSTERESIS  
1
2
V
t
t
= RESET TIME  
=
1
2
WATCHDOG TIME OUT PERIOD  
t1 = RESET TIME  
Figure 4. Watchdog Timeout Period vs. Temperature  
Figure 5. Watchdog Timeout Period and Reset Active Time  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
8-Pin Plastic DIP  
(N-8)  
8-Pin Cerdip  
(Q-8)  
16-Lead SOIC  
(R-16)  
5
4
8
0.310 (7.87)  
0.220 (5.59)  
16  
9
8
PIN 1  
1
0.419  
(10.65)  
0.299  
(7.60)  
0.420 (10.67)  
MAX  
0.060 (1.52)  
0.015 (0.38)  
0.200  
1
(5.08)  
MAX  
0.150  
(3.81)  
MIN  
0.413 (10.50)  
SEATING  
PLANE  
0.012  
(0.3)  
0.104  
(2.65)  
0.100 (2.54)  
BSC  
0.022 (0.558)  
0.014 (0.356)  
0.070 (1.78)  
0.30 (0.76)  
0.05 (1.27)  
REF  
0.019 (0.49)  
0.320 (8.13)  
0.290 (7.37)  
0.030  
(0.75)  
0.013  
(0.32)  
0.015 (0.381)  
0.008 (0.204)  
0.042  
(1.07)  
–4–  
REV. 0  

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