Datasheet > ADL5330ACPZ-R2

ADL5330ACPZ-R2

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
24页	865K
描述
10 MHz to 3 GHz VGA with 60 dB Gain Control Range

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数据手册

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ADL5330ACPZ-R2 数据手册

ADL5330

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VPS1

COM1

INHI

INLO

COM1

VPS1

18 VPS2

17 COM2

16 OPHI

15 OPLO

14 COM2

13 VPS2

PIN 1

INDICATOR

ADL5330

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

VPS1ꢀ VPS2

COM1

INHIꢀ INLO

VREF

Descriptions

1ꢀ 6ꢀ 13ꢀ 18 to 22

2ꢀ 5ꢀ 10

3ꢀ 4

Positive Supply. Nominally equal to 5 V.

Common for Input Stage.

Differential Inputsꢀ AC-Coupled.

Voltage Reference. Output at 1.5 V; normally ac-coupled to ground.

Input Bias. Normally ac-coupled to ground.

Output Bias. AC-Coupled to ground.

IPBS

OPBS

12ꢀ 14ꢀ 17

GNLO

COM2

OPLO

OPHI

ENBL

Gain Control Common. Connect to ground.

Common for Output Stage.

Low Side of Differential Output. Bias to V_Pwith RF chokes.

High Side of Differential Output. Bias to V_Pwith RF chokes.

Device Enable. Apply logic high for normal operation.

Gain Control Voltage Input. Nominal range 0 V to 1.4 V.

GAIN

Rev. A | Page 6 of 24

1...3 4 567 8 9...24

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