High Voltage, Latch-Up Proof,
4-Channel Multiplexer
ADG5204
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Latch-up proof
ADG5204
3 pF off source capacitance
S1
26 pF off drain capacitance
S2
D
−0.6 pC charge injection
S3
Low leakage: 0.4 nA maximum at 85°C
9 V to 22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at 15 V, 20 V, +12 V, and +36 V
S4
1 OF 4
DECODERS
A0
A1 EN
Figure 1.
V
SS to VDD analog signal range
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG5204 is a complementary metal oxide semiconductor
(CMOS) analog multiplexer, comprising four single channels.
1. Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors,
thereby preventing latch-up even under severe overvoltage
conditions.
2. Ultralow Capacitance and <1 pC Charge Injection.
3. Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5204 can be operated from dual supplies up to 22 V.
4. Single-Supply Operation.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the ADG5204 suitable for video signal switching.
The ADG5204 is designed on a trench process, which guards
against latch-up. A dielectric trench separates the P and N
channel transistors, thereby preventing latch-up even under
severe overvoltage conditions.
For applications where the analog signal is unipolar, the
ADG5204 can be operated from a single rail power supply
up to 40 V.
The ADG5204 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. Logic 0 on the EN pin disables the device. Each switch con-
ducts equally well in both directions when on, and each switch
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked. All switches
exhibit break-before-make switching action.
5. 3 V Logic-Compatible Digital Inputs.
V
INH = 2.0 V, VINL = 0.8 V.
6. No VL Logic Power Supply Required.
Rev. 0
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