Datasheet > ADG333ABRZ-REEL1

ADG333ABRZ-REEL1

更新时间： 2022-05-20 03:06:37

品牌	Logo	应用领域
亚德诺 - ADI		开关光电二极管
页数	文件大小	规格书
12页	317K
描述
Quad SPDT Switch

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数据手册

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ADG333ABRZ-REEL1 数据手册

ADG333A

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

IN1

S1A

20 IN4

19 S4A

18 D4

IN1

S1A

20 IN4

19 S4A

18 D4

IN1

S1A

20 IN4

19 S4A

18 D4

S1B

17 S4B

ADG333A

TOP VIEW

(Not to Scale)

S1B

ADG333A

TOP VIEW

(Not to Scale)

17 S4B

ADG333A

S1B

17 S4B

TOP VIEW

GND

S2B

15 NC

14 S3B

13 D3

(Not to Scale)

GND

S2B

15 NC

14 S3B

13 D3

GND

S2B

15 NC

14 S3B

13 D3

S2A

12 S3A

11 IN3

S2A

12 S3A

11 IN3

S2A

12 S3A

11 IN3

IN2 10

NC = NO CONNECT

Figure 2. PDIP Pin Configuration

Figure 3. SOIC Pin Configuration

Figure 4. SSOP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1ꢀ 10ꢀ 11ꢀ 20

IN1ꢀ IN2ꢀ IN3ꢀ IN4

Logic Control Input.

2ꢀ 4ꢀ 7ꢀ 9ꢀ 12ꢀ 14ꢀ

17ꢀ 19

S1Aꢀ S1Bꢀ S2Bꢀ S2Aꢀ

S3Aꢀ S3Bꢀ S4Bꢀ S4A

Source Terminal. Can be an input or output.

3ꢀ 8ꢀ 13ꢀ 18

D1ꢀ D2ꢀ D3ꢀ D4

V_SS

Drain Terminal. Can be an input or output.

Most Negative Power Supply Potential in Dual Supplies. In single-supply applicationsꢀ it can be

connected to ground.

GND

V_DD

Ground (0 V) Reference.

No Connect.

Most Positive Power Supply Potential.

Rev. A | Page 7 of 12

1...4 5 678 9 10...12

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