ADF4216/ADF4217/ADF4218
Parameter
B Version
B Chips2
Unit
Test Conditions/Comments
POWER SUPPLIES (Continued)
I
DD (RF + IF)6
ADF4216
ADF4217
ADF4218
See TPC 22 and TPC 23
18
21
25
9
12
14
mA max
mA max
mA max
9.0 mA typical at VDD = 3 V and TA = 25°C
12 mA typical at VDD = 3 V and TA = 25°C
14 mA typical at VDD = 3 V and TA = 25°C
IDD (RF Only)
ADF4216
ADF4217
10
14
18
5
7
9
mA max
mA max
mA max
5.0 mA typical at VDD = 3 V and TA = 25°C
7.0 mA typical at VDD = 3 V and TA = 25°C
9.0 mA typical at VDD = 3 V and TA = 25°C
ADF4218
I
DD (IF Only)
ADF4216
ADF4217
ADF4218
9
9
9
0.6
5
4.5
4.5
4.5
0.6
5
mA max
mA max
mA max
mA max
µA max
4.5 mA typical at VDD = 3 V and TA = 25°C
4.5 mA typical at VDD = 3 V and TA = 25°C
4.5 mA typical at VDD = 3 V and TA = 25°C
TA = 25°C
IP (IP1 + IP2)
Low-Power Sleep Mode
0.5 µA typical
NOISE CHARACTERISTICS
Phase Noise Floor7
–171
–164
–171
–164
dBc/Hz typ
dBc/Hz typ
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ VCO Output
Phase Noise Performance8
ADF4216, ADF4217, ADF4218 (IF)9
ADF4216 (RF): 900 MHz Output10
ADF4217 (RF): 900 MHz Output10
ADF4218 (RF): 900 MHz Output10
ADF4216 (RF): 836 MHz Output11
ADF4217 (RF): 1750 MHz Output12
ADF4217 (RF): 1750 MHz Output13
ADF4218 (RF): 1960 MHz Output14
Spurious Signals
–91
–87
–88
–90
–78
–85
–66
–84
–91
–87
–88
–90
–78
–85
–66
–84
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 300 Hz Offset and 30 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
ADF4216 ADF4217, ADF4218 (IF)9
ADF4216 (RF): 900 MHz Output10
ADF4217 (RF): 900 MHz Output10
ADF4218 (RF): 900 MHz Output10
ADF4216 (RF): 836 MHz Output11
ADF4217 (RF): 1750 MHz Output12
ADF4217 (RF): 1750 MHz Output13
ADF4218 (RF): 1960 MHz Output14
–97/–106
–98/–106
–91/–100
–80/–84
–80/–84
–88/–90
–65/–73
–80/–84
–97/–106
–98/–106
–91/–100
–80/–84
–80/–84
–88/–90
–65/–73
–80/–84
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 30 kHz/60 kHz and 30 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
NOTES
1Operating temperature range is as follows: B Version: –40°C to +85°C.
2The B Chip specifications are given as typical values.
3This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the IF/RF input is divided down to a frequency that is
less than this value.
4VDD1 = VDD2 = 3 V; For VDD1 = VDD2 = 5 V, use CMOS-compatible levels.
5Guaranteed by design. Sample tested to ensure compliance.
6P = 16; RFIN = 900 MHz; IFIN = 540 MHz.
7The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value).
8The phase noise is measured with the EVAL-ADF421XEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for the
synthesizer (fREFOUT = 10 MHz @ 0 dBm).
9fREFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fIF = 540 MHz; N = 2700; Loop B/W = 20 kHz.
10
11
12
13
14
f
f
f
f
f
= 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 900 MHz; N = 4500; Loop B/W = 20 kHz.
= 10 MHz; fPFD = 30 kHz; Offset frequency = 300 Hz; fRF = 836 MHz; N = 27867; Loop B/W = 3 kHz.
= 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 1750 MHz; N = 8750; Loop B/W = 20 kHz.
= 10 MHz; fPFD = 10 kHz; Offset frequency = 200 Hz; fRF = 1750 MHz; N = 175000; Loop B/W = 1 kHz.
= 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 1960 MHz; N = 9800; Loop B/W = 20 kHz.
REFIN
REFIN
REFIN
REFIN
REFIN
Specifications subject to change without notice.
–3–
REV. 0