Datasheet > ADF4213BCP-REEL7

ADF4213BCP-REEL7

更新时间： 2024-01-05 17:21:29

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
20页	248K
描述
IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit

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技术参数
数据手册

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ADF4213BCP-REEL7 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFN	包装说明：	CSP-20
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	5A991.B	HTS代码：	8542.39.00.01
风险等级：	5.76	模拟集成电路 - 其他类型：	PLL FREQUENCY SYNTHESIZER
JESD-30 代码：	S-XQCC-N20	JESD-609代码：	e0
长度：	4 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	VQCCN
封装等效代码：	LCC20,.16SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, VERY THIN PROFILE	峰值回流温度（摄氏度）：	240
电源：	3/5 V	认证状态：	Not Qualified
座面最大高度：	0.9 mm	子类别：	PLL or Frequency Synthesis Circuits
最大供电电流 (Isup)：	20 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	4 mm	Base Number Matches：	1

ADF4213BCP-REEL7 数据手册

ADF4210/ADF4211/ADF4212/ADF4213

Parameter

B Version B Chips²Unit

Test Conditions/Comments

POWER SUPPLIES

V_DD

V_P

_DD1

2.7/5.5

V_DD

V_DD1/6.0

2.7/5.5

V_DD

V_DD1/6.0

V min/V max

V min/V max V_DD1, V_DD2 Յ V_DD1, V_DD2 Յ 6.0 V

_DD(RF + IF)⁶

ADF4210

ADF4211

ADF4212

ADF4213

_DD(RF Only)

ADF4210

ADF4211

ADF4212

ADF4213

_DD(IF Only)

ADF4210

ADF4211

ADF4212

ADF4213

11.5

15.0

17.5

11.5

15.0

17.5

mA max

9.0 mA typical

11.0 mA typical

13.0 mA typical

15 mA typical

6.75

12.5

6.75

12.5

mA max

5.0 mA typical

7.0 mA typical

9.0 mA typical

11 mA typical

5.5

1.0

5.5

1.0

mA max

µA typ

4.5 mA typical

I_P(I_P1 + I_P2)

Low-Power Sleep Mode

T_A= 25°C, 0.55 mA typical

NOISE CHARACTERISTICS

ADF4213 Phase Noise Floor⁷

–171

–164

–171

–164

dBc/Hz typ

@ 25 kHz PFD Frequency

@ 200 kHz PFD Frequency

@ VCO Output

Phase Noise Performance⁸

ADF4210/ADF4211, IF: 540 MHz Output⁹

ADF4212/ADF4213, IF: 900 MHz Output¹⁰

ADF4210/ADF4211, RF: 900 MHz Output¹⁰

ADF4212/ADF4213, RF: 900 MHz Output¹⁰

–91

–89

–91

–89

–91

–85

–67

–88

dBc/Hz typ

@ 1 kHz Offset and 200 kHz PFD Frequency

See Note 11

ADF4211/ADF4212, RF: 1750 MHz Output¹²–85

ADF4211/ADF4212, RF: 1750 MHz Output¹³–67

ADF4212/ADF4213, RF: 2400 MHz Output¹⁴–88

Spurious Signals

@ 200 Hz Offset and 10 kHz PFD Frequency

@ 1 kHz Offset and 1 MHz PFD Frequency

ADF4210/ADF4211, IF: 540 MHz Output⁹

ADF4212/ADF4213, IF: 900 MHz Output¹⁰

ADF4210/ADF4211, RF: 900 MHz Output¹⁰

ADF4212/ADF4213, RF: 900 MHz Output¹⁰

–88/–90

–90/–94

–80/–82

–65/–70

–80/–82

dB typ

@ 200 kHz/400 kHz and 200 kHz PFD Frequency

See Note 11

–90/–94

ADF4211/ADF4212, RF: 1750 MHz Output¹²–80/–82

ADF4211/ADF4212, RF: 1750 MHz Output¹³–65/–70

ADF4212/ADF4213, RF: 2400 MHz Output¹⁴–80/–82

See Note 11

@ 10 kHz/20 kHz and 10 kHz PFD Frequency

@ 200 kHz/400 kHz and 200 kHz PFD Frequency

NOTES

¹Operating temperature range is as follows: B Version: –40°C to +85°C.

²The B Chip speciﬁcations are given as typical values.

³This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the IF/RF input is divided down to a frequency that is

less than this value.

⁴V_DD1 = V_DD2 = 3 V; For V_DD1 = V_DD2 = 5 V, use CMOS-compatible levels, T_A= 25°C.

⁵Guaranteed by design. Sample tested to ensure compliance.

⁶V_DD= 3 V; P = 16; RF_IN= 900 MHz; IF_IN= 540 MHz, T_A= 25°C.

⁷The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value). See

TPC 16.

⁸The phase noise is measured with the EVAL-ADF4210/ADF4212/ADF4213EB Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the

REFIN for the synthesizer (f_REFOUT= 10 MHz @ 0 dBm).

⁹f_REFIN= 10 MHz; f_PFD= 200 kHz; Offset frequency = 1 kHz; f_IF= 540 MHz; N = 2700; Loop B/W = 20 kHz.

= 10 MHz; f_PFD= 200 kHz; Offset frequency = 1 kHz; f_RF= 900 MHz; N = 4500; Loop B/W = 20 kHz.

REFIN

¹¹Same conditions as listed in Note 10.

= 10 MHz; f_PFD= 200 kHz; Offset frequency = 1 kHz; f_RF= 1750 MHz; N = 8750; Loop B/W = 20 kHz.

= 10 MHz; f_PFD= 10 kHz; Offset frequency = 200 Hz; f_RF= 1750 MHz; N = 175000; Loop B/W = 1 kHz.

= 10 MHz; f_PFD= 1 MHz; Offset frequency = 1 kHz; f_RF= 1960 MHz; N = 9800; Loop B/W = 20 kHz.

REFIN

Speciﬁcations subject to change without notice.

–3–

REV. A

1 234 5 6 7...20

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与ADF4213BCP-REEL7相关器件

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ADF4213BCPZ-RL	ADI	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit	获取价格
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