CMOS Microprocessor-Compatible
12-Bit A/D Converter
a
ADC912A
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Low Cost
V
A
IN
AGND
REFIN
Low Transition Noise between Code
12-Bit Accurate
؎1/2 LSB Nonlinearity Error over Temperature
No Missing Codes at All Temperatures
10 s Conversion Time
5k⍀
V
DD
12-BIT DAC
V
SS
ADC912A
SUCCESSIVE
APPROXIMATION
REGISTER
Internal or External Clock
8- or 16-Bit Data Bus Compatible
Improved ESD Resistant Design
Latchup Resistant Epi-CMOS Processing
Low 95 mW Power Consumption
Space-Saving 24-Lead 0.3" DIP, or 24-Lead SOIC
12-BIT LATCH
BUSY
CS
4
8
CONTROL
LOGIC
RD
MULTIPLEXER
8
HBEN
APPLICATIONS
CLK OUT
CLK IN
THREE-STATE
OUTPUT
DRIVERS
THREE-STATE
OUTPUT
Data Acquisition Systems
DSP System Front End
Process Control Systems
Portable Instrumentation
CLOCK
OSCILLATOR
DRIVERS
D
D
D
D
DGND D D
3/11 0/8
11
8
7
4
GENERAL DESCRIPTION
not located at a transition voltage, see Figures 1 and 2. NPN
digital output transistors provide excellent bus interface timing,
125 ns access and bus disconnect time which results in faster
data transfer without the need for wait states. An external
1.25 MHz clock provides a 10 µs conversion time.
The ADC912A is a monolithic 12-bit accurate CMOS A/D
converter. It contains a complete successive-approximation A/D
converter built with a high-accuracy D/A converter, a precision
bipolar transistor high-speed comparator, and successive-
approximation logic including three-state bus interface for logic
compatibility. The accuracy of the ADC912A results from the
addition of precision bipolar transistors to Analog Devices’
advanced-oxide isolated silicon-gate CMOS process. Particular
attention was paid to the reduction of transition noise between
adjacent codes achieving a 1/6 LSB uncertainty. The low noise
design produces the same digital output for dc analog inputs
In stand-alone applications an internal clock can be used with
external crystal.
An external negative five-volt reference sets the 0 V to 10 V
input range. Plus 5 V and minus 12 V power supplies result in
95 mW of total power consumption.
256
256 SUCCESSIVE
CONVERSIONS
100
90
WITH
192
128
64
A
= 4.99756V
IN
10
0%
TRANSITION NOISE
0
2045 2046 2047 2048 2049
OUTPUT CODE – Decimal
ANALOG INPUT
Figure 2. Transition Noise Cross Plot
Figure 1. Code Repetition
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2001