Datasheet > ADC1061CIWM

ADC1061CIWM

更新时间： 2024-01-03 16:31:33

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器光电二极管
页数	文件大小	规格书
11页	323K
描述
10-Bit High-Speed レP-Compatible A/D Converter with Track/Hold Function

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ADC1061CIWM 技术参数

生命周期：	Obsolete	包装说明：	DIE,
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.8
最长转换时间：	1.8 µs	转换器类型：	ADC, FLASH METHOD
JESD-30 代码：	R-XUUC-N20	最大线性误差 (EL)：	0.19%
模拟输入通道数量：	1	位数：	10
功能数量：	1	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出位码：	BINARY	输出格式：	PARALLEL, WORD
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	RECTANGULAR	封装形式：	UNCASED CHIP
认证状态：	Not Qualified	采样并保持/跟踪并保持：	TRACK
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子位置：	UPPER
Base Number Matches：	1

ADC1061CIWM 数据手册

Functional Description (Continued)

DS010559-13

FIGURE 3. Block Diagram of the Modified Half-Flash Converter Architecture

The remaining four LSBs may now be determined using the

same sixteen comparators that were used for the first flash

conversion. The MSB Ladder tap voltage just below the input

voltage (as determined by the first flash) is subtracted from

the input voltage and compared with the tap points on the

sixteen LSB Ladder resistors. The result of this second flash

conversion is then decoded, and the full 10-bit result is

latched.

tive. When S /H goes high, the result of the coarse conver-

sion is latched and the “fine” conversion begins. After ap-

proximately 1.2 µs (1.8 µs maximum), INT goes low,

indicating that the conversion results are latched and can be

read by pulling RD low. Note that CS must be low to enable

S /H or RD . CS is internally “ANDed” with the sample and

read control signals; the input voltage is sampled when CS

and S /H are low, and is read when CS and RD are low.

Note that the sixteen comparators used in the first flash con-

version are reused for the second flash. Thus, the half-flash

conversion techniques used in the ADC1061 needs only a

small fraction of the number of comparators that would be re-

quired for a traditional flash converter, and far fewer than

would be used in a conventional half-flash approach. This al-

lows the ADC1061 to perform high-speed conversions with-

out excessive power drain.

MODE 2

In Mode 2, also called “RD mode”, the S /H and RD pins are

tied together. A conversion is initiated by pulling both pins

low. The ADC1061 samples the input voltage and causes the

coarse comparators to become active. An internal timer then

terminates the coarse conversion and begins the fine con-

version.

About 1.8 µs (2.4 µs maximum) after S /H and RD are pulled

low, INT goes low, indicating that the conversion is complete.

Approximately 20 ns later the data appearing on the

TRI-STATE output pins will be valid. Note that data will ap-

pear on these pins throughout the conversion, but will be

valid only after INT goes low.

Applications Information

1.0 Modes of Operation

The ADC1061 has two basic digital interface modes. These

are illustrated in Figure 1 and Figure 2.

MODE 1

In this mode, the S /H pin controls the start of conversion.

S /H is pulled low for a minimum of 250 ns. This causes the

comparators in the “coarse” flash converter to become ac-

www.national.com

1...4 5 678 9 10 11

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与ADC1061CIWM相关器件

型号	品牌	获取价格	描述	数据表
ADC1061CIWMX	ETC	获取价格	Analog-to-Digital Converter， 10-Bit
ADC1061CMJ	TI	获取价格	10-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP20, CERAMIC, DIP-20
ADC10662	NSC	获取价格	10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
ADC10662	TI	获取价格	ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
ADC10662_14	TI	获取价格	10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
ADC10662_15	TI	获取价格	10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
ADC10662CIJ	NSC	获取价格	IC 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP24, CERDIP-24, Analog to Digital Converte
ADC10662CIN	TI	获取价格	2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP24, 0.600 INCH, PLASTIC, DIP-24
ADC10662CIN	NSC	获取价格	IC 2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP24, 0.600 INCH, PLASTIC, DIP-24, Ana
ADC10662CIWM	NSC	获取价格	10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold

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