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ADC104S021QIMM/NOPB PDF预览

ADC104S021QIMM/NOPB

更新时间: 2024-01-23 02:07:20
品牌 Logo 应用领域
德州仪器 - TI 光电二极管转换器模数转换器
页数 文件大小 规格书
29页 1164K
描述
汽车类、4 通道、50ksps 至 200ksps、10 位模数转换器 | DGS | 10 | -40 to 85

ADC104S021QIMM/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SSOP
包装说明:TSSOP, TSSOP10,.19,20针数:10
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.23
最大模拟输入电压:5.25 V最小模拟输入电压:
最长转换时间:4.0625 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:S-PDSO-G10JESD-609代码:e3
长度:3 mm最大线性误差 (EL):0.0293%
湿度敏感等级:1模拟输入通道数量:4
位数:10功能数量:1
端子数量:10最高工作温度:85 °C
最低工作温度:-40 °C输出位码:BINARY
输出格式:SERIAL封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP10,.19,20
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified采样速率:0.2 MHz
采样并保持/跟踪并保持:TRACK筛选级别:AEC-Q100
座面最大高度:1.07 mm子类别:Analog to Digital Converters
最大压摆率:1.8 mA最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm
Base Number Matches:1

ADC104S021QIMM/NOPB 数据手册

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ADC104S021  
www.ti.com  
SNAS278H FEBRUARY 2005REVISED MARCH 2013  
Figure 4. ADC104S021/ADC104S021Q Serial Timing Diagram  
CS  
t
CSU  
SCLK  
t
CLH  
SCLK  
Figure 5. SCLK and CS Timing Parameters  
Specification Definitions  
ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold  
capacitor to charge up to the input voltage.  
APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the  
input signal is acquired or held for conversion.  
CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input  
voltage to a digital word.  
CROSSTALK is the coupling of energy from one channel into the other channel, or the amount of signal energy  
from one analog input that appears at the measured analog input.  
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1  
LSB.  
DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The  
specification here refers to the SCLK.  
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise  
and Distortion or SINAD. ENOB is defined as (SINAD 1.76) / 6.02 and says that the converter is  
equivalent to a perfect ADC of this (ENOB) number of bits.  
FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental  
drops 3 dB below its low frequency value for a full scale input.  
FULL SCALE ERROR (FSE) is a measure of how far the last code transition is from the ideal 1½ LSB below  
+
VREF and is defined as:  
+
VFSE = Vmax + 1.5 LSB – VREF  
where  
Vmax is the voltage at which the transition to the maximum code occurs  
FSE can be expressed in Volts, LSB or percent of full scale range  
(1)  
7
Copyright © 2005–2013, Texas Instruments Incorporated  
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Product Folder Links: ADC104S021  
 

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