Datasheet > ADAU1462WBCPZ150RL

ADAU1462WBCPZ150RL

更新时间： 2024-02-27 01:23:42

品牌	Logo	应用领域
亚德诺 - ADI		商用集成电路
页数	文件大小	规格书
202页	10165K
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SigmaDSP Digital Audio Processor

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ADAU1462WBCPZ150RL 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	HVQCCN,
针数：	72	Reach Compliance Code：	compliant
风险等级：	5.58	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-XQCC-N72	长度：	10 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	72	最高工作温度：	105 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
座面最大高度：	1 mm	最大供电电压 (Vsup)：	1.26 V
最小供电电压 (Vsup)：	1.14 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	10 mm
Base Number Matches：	1

ADAU1462WBCPZ150RL 数据手册

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SigmaDSP Digital Audio Processor

ADAU1462/ADAU1466

Data Sheet

Clock oscillator for generating master clock from crystal

Integer PLL and flexible clock generators

Integrated die temperature sensor

I²C and SPI control interfaces (both slave and master)

Standalone operation

FEATURES

Qualified for automotive applications

Fully programmable audio DSP for enhanced sound processing

Features SigmaStudio, a proprietary graphical programming

tool for the development of custom signal flows

Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V

Up to 24 kWords of program memory

Up to 80 kWords of parameter/data RAM

Up to 6144 SIMD instructions per sample at 48 kHz

Up to 1600 ms digital audio delay pool at 48 kHz

Audio I/O and routing

4 serial input ports, 4 serial output ports

48-channel, 32-bit digital I/O up to a sample rate of 192 kHz

Flexible configuration for TDM, I²S, left and right justified

formats, and PCM

Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and

139 dB dynamic range

Self-boot from serial EEPROM

6-channel, 10-bit SAR auxiliary control ADC

14 multipurpose pins for digital controls and outputs

On-chip regulator for generating 1.2 V from 3.3 V supply

72-lead, 10 mm × 10 mm LFCSP package with 5.3 mm

exposed pad

Temperature range: −40°C to +105°C

APPLICATIONS

Automotive audio processing

Head units

Distributed amplifiers

Rear seat entertainment systems

Trunk amplifiers

Commercial and professional audio processing

Stereo S/PDIF input and output at 192 kHz

Four PDM microphone input channels

Multichannel, byte addressable TDM serial ports

FUNCTIONAL BLOCK DIAGRAM

SPI/I C* SPI/I C*

PLLFILT

ADAU1462/

ADAU1466

VDRIVE

REGULATOR

GPIO/

AUX ADC

CLOCK

OSCILLATOR

I C/SPI

SLAVE

I C/SPI

MASTER

CLKOUT

PLL

THD_P

THD_M

TEMPERATURE

SENSOR

INPUT AUDIO

ROUTING MATRIX

OUTPUT AUDIO

ROUTING MATRIX

294.912MHz

PROGRAMMABLE AUDIO

PROCESSING CORE

S/PDIF

RECEIVER

S/PDIF

TRANSMITTER

SPDIFIN

SPDIFOUT

RAM, ROM, WATCHDOG,

MEMORY PARITY CHECK

SERIAL DATA

INPUT PORTS

(×4)

SDATA_IN3 TO SDATA_IN0

(48-CHANNEL

SDATA_OUT3 TO SDATA_OUT0

(48-CHANNEL

DIGITAL AUDIO

SERIAL DATA

OUTPUT PORTS

(×4)

8 × 2-CHANNEL

ASYNCHRONOUS

SAMPLE RATE

CONVERTERS

DIGITAL AUDIO

INPUTS)

OUTPUTS)

DIGITAL

MIC INPUT

INPUT

CLOCK

DOMAINS

(×4)

OUTPUT

CLOCK

DOMAINS

(×4)

BCLK_IN3 TO BCLK_IN0/

LRCLK_IN3 TO LRCLK_IN0

(INPUT CLOCK PAIRS)

BCLK_OUT3 TO BCLK_OUT0

LRCLK_OUT3 TO LRCLK_OUT0

(OUTPUT CLOCK PAIRS)

DEJITTER AND

CLOCK GENERATOR

*SPI/I C INCLUDES THE FOLLOWING PIN FUNCTIONS: SS_M, MOSI_M, SCL_M, SCLK_M, SDA_M, MISO_M, MISO, SDA,

SCLK, SCL, MOSI, ADDR1, SS, AND ADDR0 PINS.

Figure 1.

Rev. C

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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