AD9981
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
V
V
(3.3V)
BLUE <3>
BLUE <4>
BLUE <5>
BLUE <6>
BLUE <7>
BLUE <8>
BLUE <9>
GND
D
PIN 1
2
3
B
AIN0
GND
4
B
AIN1
5
(3.3V)
D
6
G
AIN0
GND
SOGIN0
(3.3V)
7
AD9981
TOP VIEW
(Not to Scale)
8
9
V
V
(3.3V)
DD
D
10
11
12
13
14
15
16
17
18
19
20
G
GREEN <0>
GREEN <1>
GREEN <2>
GREEN <3>
GREEN <4>
GREEN <5>
GREEN <6>
GREEN <7>
GREEN <8>
GREEN <9>
AIN1
GND
SOGIN1
(3.3V)
V
D
R
AIN0
GND
R
AIN1
PWRDN
REFLO
REFCM
REFHI
DAV (1.8)
DD
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
Figure 2. Top View (Pins Down)
Table 3. Complete Pinout List
Pin Type
Mnemonic
Function
Value
Pin No.
14
1ꢀ
ꢀ
10
2
Inputs
RAIN0
RAIN1
GAIN0
GAIN1
BAIN0
BAIN1
HSYNC0
HSYNC1
VSYNC0
VSYNC1
SOGIN0
SOGIN1
EXTCK
CLAMP
COAST
PWRDN
RED [9:0]
GREEN [9:0]
BLUE [9:0]
DATACK
Channel 0 Analog Input for Converter R
Channel 1 Analog Input for Converter R
Channel 0 Analog Input for Converter G
Channel 1 Analog Input for Converter G
Channel 0 Analog Input for Converter B
Channel 1 Analog Input for Converter B
Horizontal Sync Input for Channel 0
Horizontal Sync Input for Channel 1
Vertical Sync Input for Channel 0
Vertical Sync Input for Channel 1
Input for Sync-on-Green Channel 0
Input for Sync-on-Green Channel 1
External Clock Input
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
4
70
ꢀ8
71
ꢀ9
8
12
721
73
External Clamp Input Signal
External PLL Coast Signal Input
Power-Down Control
1
72
17
Outputs
Outputs of Converter R, Bit 9 is the MSB
Outputs of Converter G, Bit 9 is the MSB
Outputs of Converter B, Bit 9 is the MSB
Data Output Clock
28 to 37
42 to 51
54 to ꢀ3
25
Rev. 0 | Page ꢀ of 44