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AD9888KSZ-140 PDF预览

AD9888KSZ-140

更新时间: 2024-01-29 11:39:12
品牌 Logo 应用领域
亚德诺 - ADI 消费电路商用集成电路
页数 文件大小 规格书
36页 501K
描述
100 MSPS/140 MSPS/170 MSPS Analog Flat Panel Interface

AD9888KSZ-140 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFP
包装说明:FQFP,针数:128
Reach Compliance Code:unknown风险等级:5.07
Is Samacsys:N商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PQFP-G128JESD-609代码:e3
长度:20 mm湿度敏感等级:3
功能数量:1端子数量:128
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:RECTANGULAR封装形式:FLATPACK, FINE PITCH
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
座面最大高度:3.4 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:14 mm
Base Number Matches:1

AD9888KSZ-140 数据手册

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Data Sheet  
AD9888  
REVISION HISTORY  
12/11—Rev. B to Rev. C  
Moved Figure 27..............................................................................32  
Changes to Outputs (Both Data and Clocks) Section................34  
Changes to Voltage Reference Section .........................................35  
Updated Outline Dimensions........................................................36  
Changes to Ordering Guide...........................................................36  
Updated Format.................................................................. Universal  
Deleted AD9888AKSZ-205 Model .................................. Universal  
Changed Maximum Conversion Rate from  
205 MSPS to 170 MSPS ............................................ Throughout  
Changes to Figure 1 and General Description ..............................1  
Deleted AD9888KS-205 Columns, Changes to tDHO Parameter,  
Table 1.............................................................................................4  
Changes to Output Voltage, Low (VOL) Parameter, Table 1;  
Moved Figure 2..............................................................................5  
Changes to Table 2 and ESD Caution Section...............................6  
Changes to Table 3 ............................................................................8  
Changes to Table 4 ............................................................................9  
Changes to YUV Clamping Section and to Gain and Offset  
Control Section............................................................................13  
Changes to Sync-on-Green Input Section and to Figure 8........14  
Changes to Table 5 ..........................................................................15  
Moved Figure 10, Figure 11, and Figure 12 .................................16  
Changes to Captions of Figure 16 Through Figure 25...............17  
Changes to Table 8 ..........................................................................21  
Changes to Chip Identification Section .......................................24  
Changes to Table 14 and Table 17.................................................26  
Changes to Address 0x10[7:3]—Sync-on-Green Slicer Threshold  
Section and to Address 0x11[7:0]—Sync Separator Threshold  
Section ..........................................................................................27  
Changes to Address 0x14[6]—Active HSYNC (AHS) Section,  
Added Table 29, Changes to Address 0x14[3]—Active  
3/03—Rev. A to Rev. B  
Changes to Specifications ...............................................................2  
Changes to Pin Configuration.........................................................4  
Changes to Table II .........................................................................11  
Changes to Table IV........................................................................11  
Changes to Figure 20 ......................................................................16  
Changes to Figure 22 ......................................................................17  
Changes to Table V .........................................................................17  
Changes to Table VI........................................................................20  
Changes to Table XIII.....................................................................22  
Changes to Clamp Input Signal Source Section..........................22  
Changes to Table XXX....................................................................24  
Added text to Outputs (Both Data and Clocks) Section ...........29  
Updated Outline Dimensions........................................................30  
1/02—Rev. 0 to Rev. A.  
Change to Title–Part Name .............................................................1  
Change to Pin Function Detail, CKINV Section..........................7  
Change to Figure 13..........................................................................5  
Change to Figure 14........................................................................15  
Change to Figure 15........................................................................16  
Change to Figure 16........................................................................16  
Change to Figure 17........................................................................17  
Change to Figure 18 .......................................................................17  
Change to Figure 21........................................................................19  
Change to Figure 22........................................................................19  
VSYNC (AVS) Section, Added Table 33, Changes to  
Table 34.........................................................................................28  
Changes to Address 0x15[6]—Output Mode Section and to  
Address 0x15[5]—A/B Invert Control (OUTPHASE)  
Section ..........................................................................................29  
Moved Figure 26..............................................................................31  
7/01—Revision 0: Initial Version  
Rev. C | Page 3 of 36  
 

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