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AD9628 PDF预览

AD9628

更新时间: 2024-02-15 04:28:29
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
44页 1002K
描述
12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter

AD9628 数据手册

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12-Bit, 125/105 MSPS, 1.8 V Dual  
Analog-to-Digital Converter  
AD9628  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
AVDD  
AGND  
SDIO SCLK CSB  
1.8 V analog supply operation  
1.8 V CMOS or LVDS outputs  
SNR = 71.2 dBFS @ 70 MHz  
SPI  
ORA  
D11A  
D0A  
SFDR = 93 dBc @ 70 MHz  
PROGRAMMING DATA  
VIN+A  
VIN–A  
Low power: 74 mW/channel ADC core @ 125 MSPS  
Differential analog input with 650 MHz bandwidth  
IF sampling frequencies to 200 MHz  
On-chip voltage reference and sample-and-hold circuit  
2 V p-p differential analog input  
ADC  
DCOA  
VREF  
SENSE  
DRVDD  
AD9628  
DNL = 0.25 LSB  
Serial port control options  
REF  
SELECT  
VCM  
ORB  
RBIAS  
Offset binary, Gray code, or twos complement data format  
Optional clock duty cycle stabilizer  
Integer 1-to-8 input clock divider  
Data output multiplex option  
D11B  
VIN–B  
VIN+B  
ADC  
D0B  
DCOB  
Built-in selectable digital test pattern generation  
Energy-saving power-down modes  
Data clock out with programmable clock and data  
alignment  
DIVIDE  
1 TO 8  
DUTY CYCLE  
STABILIZER  
MODE  
CONTROLS  
CLK+ CLK–  
SYNC  
DCS  
PDWN DFS OEB  
NOTES  
1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;  
SEE FIGURE 7 FORLVDS PIN NAMES.  
APPLICATIONS  
Communications  
Figure 1.  
Diversity radio systems  
Multimode digital receivers  
GSM, EDGE, W-CDMA, LT E,  
CDMA2000, WiMAX, TD-SCDMA  
I/Q demodulation systems  
Smart antenna systems  
Broadband data applications  
Battery-powered instruments  
Hand-held scope meters  
Portable medical imaging  
Ultrasound  
PRODUCT HIGHLIGHTS  
1. The AD96281 operates from a single 1.8 V analog power  
supply and features a separate digital output driver supply  
to accommodate 1.8 V CMOS or LVDS logic families.  
2. The patented sample-and-hold circuit maintains excellent  
performance for input frequencies up to 200 MHz and is  
designed for low cost, low power, and ease of use.  
3. A standard serial port interface supports various product  
features and functions, such as data output formatting,  
internal clock divider, power-down, DCO/data timing and  
offset adjustments.  
Radar/LIDAR  
4. The AD9628 is packaged in a 64-lead RoHS-compliant  
LFCSP that is pin compatible with the AD9650/AD9269/  
AD9268 16-bit ADC, the AD9258/AD9251/AD9648 14-bit  
ADCs, the AD9231 12-bit ADC, and the AD9608/AD9204  
10-bit ADCs, enabling a simple migration path between  
10-bit and 16-bit converters sampling from 20 MSPS to  
125 MSPS.  
1This product is protected by a U.S patent.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 
 

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