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AD8511ARUZ-REEL PDF预览

AD8511ARUZ-REEL

更新时间: 2024-02-15 23:57:38
品牌 Logo 应用领域
亚德诺 - ADI 外围驱动器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
8页 231K
描述
9- and 11-Channel, Muxed Input LCD Reference Drivers

AD8511ARUZ-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:LEAD FREE, MO-153ED, TSSOP-48针数:48
Reach Compliance Code:unknown风险等级:5.15
Is Samacsys:N接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm湿度敏感等级:3
功能数量:11端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
标称输出峰值电流:0.35 A封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:COMMERCIAL座面最大高度:1.2 mm
最大供电电压:6.5 V最小供电电压:3.3 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:6.1 mm
Base Number Matches:1

AD8511ARUZ-REEL 数据手册

 浏览型号AD8511ARUZ-REEL的Datasheet PDF文件第2页浏览型号AD8511ARUZ-REEL的Datasheet PDF文件第3页浏览型号AD8511ARUZ-REEL的Datasheet PDF文件第4页浏览型号AD8511ARUZ-REEL的Datasheet PDF文件第5页浏览型号AD8511ARUZ-REEL的Datasheet PDF文件第6页浏览型号AD8511ARUZ-REEL的Datasheet PDF文件第8页 
AD8509/AD8511  
APPLICATIONS  
The AD8509 and AD8511 are CMOS buffers with A/B inputs,  
which are used to select between two different reference voltages  
set up by an external resistor ladder. Input bias currents are  
orders of magnitude less than competitive parts. This allows  
very large resistor ladders to be used to save supply current. A  
guaranteed value of 50 nA is much higher than actual values  
and is limited by leakage in the test system.  
The AD8509 is a 9-channel buffer and is similar to the LMC6009  
in functionality. The AD8511 is an 11-channel buffer similar to  
the CL-FP6131. However, the control to select either 9- or  
11-channel operation, the EN_11 pin of the CL-FP6131, is not  
available on the AD8511. If 9-channel operation is desired, use  
the AD8509.  
Power supply pins on the AD8509 and AD8511 have multiple  
ground and VCC connections. Because of the high peak currents  
that these buffers can deliver, it is strongly recommended that  
all of the ground and VCC pins be connected, and that the VCC  
pins be suitably bypassed.  
Buffer outputs are designed to drive resistive loads. They are  
also stable with capacitive loads, so no resistors should be used  
in series with these outputs to attain the best display perform-  
ance. Outputs have high slew rates and 6 µs settling times. Each  
output can deliver a minimum of 120 mA, assuring fast response  
to varying loads.  
Rev. B | Page 7 of 8  
 

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