AD8403ARZ1

更新时间： 2024-02-01 09:34:04

品牌	Logo	应用领域
亚德诺 - ADI		电位器
页数	文件大小	规格书
32页	610K
描述
1-/2-/4-Channel Digital Potentiometers

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数据手册

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AD8403ARZ1 数据手册

AD8400/AD8402/AD8403

Parameter

DYNAMIC CHARACTERISTICS^{6, 10}

Symbol

Conditions

Min

Typ¹

Max

Unit

Bandwidth −3 dB

Total Harmonic Distortion

V_WSettling Time

BW_10 K

THD_W

t_S

R = 10 kΩ

600

0.003

kHz

μs

V_A= 1 V rms + 2 V dc, V_B= 2 V dc, f = 1 kHz

V_A= V_DD, V_B= 0 V, 1% error band

Resistor Noise Voltage

Crosstalk¹¹

e_NWB

C_T

_WB= 5 kΩ, f = 1 kHz, = 0

V_A= V_DD, V_B= 0 V

nVꢀ√Hz

−65

¹Typical represents average readings at 25°C and V_DD= 5 V.

²Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 38.

_W= 50 μA for V_DD= 3 V and I_W= 400 μA for V_DD= 5 V for the 10 kΩ versions.

³V_AB= V_DD, wiper (V_W) = no connect.

⁴INL and DNL are measured at V_Wwith the RDAC configured as a potentiometer divider similar to a voltage output DꢀA converter. V_A= V_DDand V_B= 0 V.

DNL specification limits of 1 LSB maximum are guaranteed monotonic operating conditions. See the test circuit in Figure 37.

⁵Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.

⁶Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining

resistor terminals are left open circuit.

⁷Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.

⁸Worst-case supply current is consumed when the input logic level is at 2.4 V, a standard characteristic of CMOS logic. See Figure 28 for a plot of I_DDvs. logic voltage.

⁹P_DISSis calculated from (I_DD× V_DD). CMOS logic level inputs result in minimum power dissipation.

¹⁰All dynamic characteristics use V_DD= 5 V.

¹¹Measured at a V_Wpin where an adjacent V_Wpin is making a full-scale voltage change.

Rev. E | Page 5 of 32

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