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AD7840KP-REEL PDF预览

AD7840KP-REEL

更新时间: 2024-02-12 23:49:11
品牌 Logo 应用领域
亚德诺 - ADI 信息通信管理转换器
页数 文件大小 规格书
17页 430K
描述
Complete 14-Bit CMOS DAC

AD7840KP-REEL 技术参数

Source Url Status Check Date:2013-05-01 14:56:20.958是否无铅: 含铅
是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.27最大模拟输出电压:3 V
最小模拟输出电压:-3 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL, PARALLEL, WORD
JESD-30 代码:S-PQCC-J28JESD-609代码:e0
长度:11.5062 mm最大线性误差 (EL):0.0061%
湿度敏感等级:1标称负供电电压:-5 V
位数:14功能数量:1
端子数量:28最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC28,.5SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):225电源:+-5 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大稳定时间:4 µs标称安定时间 (tstl):2.5 µs
子类别:Other Converters最大压摆率:14 mA
标称供电电压:5 V表面贴装:YES
技术:BICMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.5062 mm
Base Number Matches:1

AD7840KP-REEL 数据手册

 浏览型号AD7840KP-REEL的Datasheet PDF文件第3页浏览型号AD7840KP-REEL的Datasheet PDF文件第4页浏览型号AD7840KP-REEL的Datasheet PDF文件第5页浏览型号AD7840KP-REEL的Datasheet PDF文件第7页浏览型号AD7840KP-REEL的Datasheet PDF文件第8页浏览型号AD7840KP-REEL的Datasheet PDF文件第9页 
AD7840  
P IN CO NFIGURATIO NS  
D IP /SSO P  
P LCC  
D /A SECTIO N  
for external use, it should he decoupled to AGND with a 200 Ω  
resistor in series with a parallel combination of a 10 µF tantalum  
capacitor and a 0.1 µF ceramic capacitor.  
T he AD7840 contains a 14-bit voltage mode D/A converter  
consisting of highly stable thin film resistors and high speed  
NMOS single-pole, double-throw switches. T he simplified cir-  
cuit diagram for the DAC section is shown in Figure 1. T he  
three MSBs of the data word are decoded to drive the seven  
switches A–G. T he 11 LSBs switch an 11-bit R-2R ladder struc-  
ture. T he output voltage from this converter has the same polar-  
ity as the reference voltage, REF IN.  
T he REF IN voltage is internally buffered by a unity gain ampli-  
fier before being applied to the D/A converter and the bipolar  
bias circuitry. T he D/A converter is configured and sealed for a  
3 V reference and the device is tested with 3 V applied to REF  
IN. Operating the AD7840 at reference voltages outside the  
±5% tolerance range may result in degraded performance from  
the part.  
Figure 2. Internal Reference  
EXTERNAL REFERENCE  
In some applications, the user may require a system reference or  
some other external reference to drive the AD7840 reference in-  
put. Figure 3 shows how the AD586 5 V reference can be con-  
ditioned to provide the 3 V reference required by the AD7840  
REF IN. An alternate source of reference voltage for the  
AD7840 in systems which use both a DAC and an ADC is to  
use the REF OUT voltage of ADCs such as the AD7870 and  
AD7871. A circuit showing this arrangement is shown in  
Figure 20.  
Figure 1. DAC Ladder Structure  
INTERNAL REFERENCE  
T he AD7840 has an on-chip temperature compensated buried  
Zener reference (see Figure 2) which is factory trimmed to 3 V  
±10 mV. T he reference voltage is provided at the REF OUT  
pin. T his reference can be used to provide both the reference  
voltage for the D/A converter and the bipolar bias circuitry. T his  
is achieved by connecting the REF OUT pin to the REF IN pin  
of the device.  
T he reference voltage can also be used as a reference for other  
components and is capable of providing up to 500 µA to an ex-  
ternal load. T he maximum recommended capacitance on REF  
OUT for normal operation is 50 pF. If the reference is required  
Figure 3. AD586 Driving AD7840 REF IN  
REV. B  
–5–  

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