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AD743JRZ-16-REEL

更新时间： 2024-01-15 20:20:37
品牌 Logo 应用领域
亚德诺 - ADI 运算放大器放大器电路光电二极管PC
页数 文件大小 规格书
12页 230K
描述
Ultralow Noise BiFET Op Amp

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AD743JRZ-16-REEL 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP16,.3针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.17
放大器类型：OPERATIONAL AMPLIFIER架构：VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB)：0.0006 µA25C 时的最大偏置电流 (IIB)：0.0004 µA
最小共模抑制比：78 dB标称共模抑制比：95 dB
频率补偿：YES最大输入失调电流 (IIO)：0.0064 µA
最大输入失调电压：1500 µVJESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：10.3 mm
低-偏置：YES低-失调：NO
湿度敏感等级：1负供电电压上限：-18 V
标称负供电电压 (Vsup)：-15 V功能数量：1
端子数量：16最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：+-15 V认证状态：Not Qualified
座面最大高度：2.65 mm标称压摆率：2.8 V/us
子类别：Operational Amplifier最大压摆率：10 mA
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：YES技术：BIPOLAR
温度等级：COMMERCIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
标称均一增益带宽：4500 kHz最小电压增益：800000
宽度：7.5 mmBase Number Matches：1

AD743JRZ-16-REEL 数据手册

 浏览型号AD743JRZ-16-REEL的Datasheet PDF文件第4页浏览型号AD743JRZ-16-REEL的Datasheet PDF文件第5页浏览型号AD743JRZ-16-REEL的Datasheet PDF文件第6页浏览型号AD743JRZ-16-REEL的Datasheet PDF文件第8页浏览型号AD743JRZ-16-REEL的Datasheet PDF文件第9页浏览型号AD743JRZ-16-REEL的Datasheet PDF文件第10页 
AD743  
OP AMP PERFORMANCE: JFET VS. BIPOLAR  
low frequency noise performance. Random air currents can gen-  
erate varying thermocouple voltages that appear as low frequency  
noise; therefore, sensitive circuitry should be well shielded from  
air flow. Keeping absolute chip temperature low also reduces low  
frequency noise in two ways. First, the low frequency noise is  
strongly dependent on the ambient temperature and increases  
above +25°C. Second, since the gradient of temperature from the  
IC package to ambient is greater, the noise generated by random  
air currents, as previously mentioned, will be larger in magnitude.  
Chip temperature can be reduced both by operation at reduced  
supply voltages and by the use of a suitable clip-on heat sink,  
if possible.  
The AD743 is the first monolithic JFET op amp to offer the low  
input voltage noise of an industry-standard bipolar op amp without  
its inherent input current errors. This is demonstrated in Figure 2,  
which compares input voltage noise versus input source resis-  
tance of the OP27 and AD743 op amps. From this figure, it is  
clear that at high source impedance the low current noise of the  
AD743 also provides lower total noise. It is also important to  
note that with the AD743 this noise reduction extends all the  
way down to low source impedances. The lower dc current errors  
of the AD743 also reduce errors due to offset and drift at high  
source impedances (Figure 3).  
Low frequency current noise can be computed from the magni-  
tude of the dc bias current  
1000  
R
OP27 AND  
RESISTOR  
( — )  
SOURCE  
˜
In = 2qIB∆f  
E
O
and increases below approximately 100 Hz with a 1/f power spectral  
density. For the AD743, the typical value of current noise is  
6.9 fA/√Hz at 1 kHz. Using the formula  
R
SOURCE  
100  
AD743 AND RESISTOR  
OR  
OP27 AND RESISTOR  
AD743 AND  
RESISTOR  
˜
In = 4kT / R∆f  
(
)
to compute the Johnson noise of a resistor, expressed as a current,  
one can see that the current noise of the AD743 is equivalent to  
that of a 3.45 ꢀ 108 Ω source resistance.  
10  
RESISTOR NOISE ONLY  
(– – –)  
At high frequencies, the current noise of a FET increases pro-  
portionately to frequency. This noise is due to the “real” part of  
the gate input impedance, which decreases with frequency. This  
noise component usually is not important, since the voltage noise  
of the amplifier impressed upon its input capacitance is an appar-  
ent current noise of approximately the same magnitude.  
1
100  
1k  
10k  
100k  
1M  
10M  
SOURCE RESISTANCE (⍀)  
Figure 2. Total Input Noise Spectral Density @ 1 kHz  
vs. Source Resistance  
In any FET input amplifier, the current noise of the internal  
bias circuitry can be coupled externally via the gate-to-source  
capacitances and appears as input current noise. This noise is  
totally correlated at the inputs, so source impedance match-  
ing will tend to cancel out its effect. Both input resistance and  
input capacitance should be balanced whenever dealing with  
source capacitances of less than 300 pF in value.  
100  
OP27  
10  
LOW NOISE CHARGE AMPLIFIERS  
As stated, the AD743 provides both low voltage and low current  
noise. This combination makes this device particularly suitable  
in applications requiring very high charge sensitivity, such as  
capacitive accelerometers and hydrophones. When dealing with  
a high source capacitance, it is useful to consider the total input  
charge uncertainty as a measure of system noise.  
1
AD743  
0.1  
100  
1M  
10M  
1k  
10k  
100k  
SOURCE RESISTANCE (⍀)  
Charge (Q) is related to voltage and current by the simply stated  
fundamental relationships  
Figure 3. Input Offset Voltage vs. Source Resistance  
dQ  
Q = CV and I =  
dt  
DESIGNING CIRCUITS FOR LOW NOISE  
An op amp’s input voltage noise performance is typically divided  
into two regions: flatband and low frequency noise. The AD743  
offers excellent performance with respect to both. The figure of  
2.9 nV/√Hz @ 10 kHz is excellent for a JFET input amplifier. The  
0.1 Hz to 10 Hz noise is typically 0.38 µV p-p. The user should  
pay careful attention to several design details in order to optimize  
As shown, voltage, current, and charge noise can all be directly  
related. The change in open circuit voltage (∆V) on a capacitor  
will equal the combination of the change in charge (∆Q/C) and  
the change in capacitance with a built in charge (Q/∆C).  
REV. E  
–7–  
1...45678910...12

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