Datasheet > AD73322LARUZ1

AD73322LARUZ1

更新时间： 2022-02-26 10:58:05

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
49页	767K
描述
Low Cost, Low Power CMOS General-Purpose Dual Analog Front

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数据手册

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AD73322LARUZ1 数据手册

AD73322L

A and Y Versions

Typ

Parameter

Min

Max

Unit

Test Conditions/Comments

0.0625

0.125

0.1875

0.25

0.3125

0.375

0.4375

> 0.5

−0.25

−0.6

−1.4

−2.8

− 4.5

−7.0

−9.5

<−12.5

LOGIC INPUTS

V_INH, Input High Voltage

V_INL, Input Low Voltage

I_IH, Input Current

C_IN, Input Capacitance

LOGIC OUTPUT

V_OH, Output High Voltage

V_OL, Output Low Voltage

Three-State Leakage Current

POWER SUPPLIES

AVDD1, AVDD2

DVDD

0.8

+10

DVDD − 0.8

−10

µA

DVDD

0.4

+10

|IOUT| ≤100 µA

DVDD − 0.4

−10

µA

2.7

3.3

DVDD I_DD

See Table 2

¹Test conditions: input PGA set for 0 dB gain, output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted).

²At input to sigma-delta modulator of ADC.

³Guaranteed by design.

⁴Overall group delay is affected by the sample rate and the external digital filtering.

⁵The ADC’s input impedance is inversely proportional to DMCLK and is approximated by (3/3 × 10¹¹)/DMCLK.

⁶Between VOUTP1 and VOUTN1 or between VOUTP2 and VOUTN2.

⁷At VOUT output.

⁸Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of −10 dBm0), with 38 dB

preamplifier bypassed and input gain of 0 dB.

⁹Test conditions: no load on digital inputs, analog inputs ac-coupled to ground, no load on analog outputs.

CURRENT SUMMARY

AVDD = DVDD = 3.3 V. These values are in mA and are typical values unless otherwise noted.

Table 2.

Analog

Current

Digital

Current

Total

Current (Typ)

Total

Current (Max)

Conditions

MCLK ON

YES

Comments

ADCs on only

DACs on only

ADCs and DACs on

ADCs and DACs and

Input amps on

3.4

8.8

11.6

13.8

6.3

6.5

7.0

9.7

REFOUT disabled

15.3

18.6

20.8

ADCs and DACs and

AGT on

All sections on

REFCAP on only

REFCAP and REFOUT

On only

13.2

7.0

20.2

YES

REFOUT disabled

17.2

0.65

2.56

7.0

24.2

0.67

2.57

1.25

4.5

YES

All sections off

1.25

1.8

YES

MCLK active levels equal

to 0 V and DVDD

Digital inputs static and

Equal to 0 V or DVDD

All sections off

0 µA

12.5 µA

12.7 µA

40 µA

Rev. A | Page 6 of 48

1...4 5 678 9 10...49

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