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AD7302 PDF预览

AD7302

更新时间: 2024-02-14 12:07:19
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 294K
描述
2.7 V to 5.5 V, Parallel Input Dual Voltage Output 8-Bit DAC

AD7302 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1
最大模拟输出电压:3 V最小模拟输出电压:
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, 8 BITSJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
最大线性误差 (EL):0.3906%湿度敏感等级:1
位数:8功能数量:1
端子数量:20最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified座面最大高度:2.65 mm
最大稳定时间:2 µs标称安定时间 (tstl):1.2 µs
子类别:Other Converters最大压摆率:5 mA
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

AD7302 数据手册

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2.7 V to 5.5 V, Parallel Input  
Dual Voltage Output 8-Bit DAC  
a
AD7302  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Two 8-Bit DACs In One Package  
20-Lead DIP/SOIC/TSSOP Package  
+2.7 V to +5.5 V Operation  
Internal and External Reference Capability  
DAC Power-Down Function  
Parallel Interface  
On-Chip Output Buffer  
Rail-to-Rail Operation  
Low Power Operation 3 mA max @ 3.3 V  
Power-Down to 1 A max @ 25؇C  
AD7302  
INPUT  
REGISTER  
DAC  
I DAC A  
I/V  
I/V  
V
A
B
OUT  
REGISTER  
D7  
D0  
INPUT  
REGISTER  
DAC  
I DAC B  
MUX  
V
OUT  
REGISTER  
A/B  
WR  
CS  
POWER ON  
RESET  
CONTROL  
LOGIC  
÷2  
AGND  
APPLICATIONS  
Portable Battery Powered Instruments  
Digital Gain and Offset Adjustment  
Programmable Voltage and Current Sources  
Programmable Attenuators  
V
REFIN  
DGND  
LDAC  
DD  
PD  
CLR  
GENERAL DESCRIPTION  
PRODUCT HIGHLIGHTS  
The AD7302 is a dual, 8-bit voltage out DAC that operates  
from a single +2.7 V to +5.5 V supply. Its on-chip precision  
output buffers allow the DAC outputs to swing rail to rail. The  
AD7302 has a parallel microprocessor and DSP-compatible  
interface with high speed registers and double buffered interface  
logic. Data is loaded to the registers on the rising edge of CS or  
WR and the A/B pin selects either DAC A or DAC B.  
1. Low Power, Single Supply Operation. This part operates  
from a single +2.7 V to +5.5 V supply and typically consumes  
15 mW at 5 V, making it ideal for battery powered applications.  
2. The on-chip output buffer amplifiers allow the outputs of the  
DACs to swing rail to rail with a settling time of typically 1.2 µs.  
3. Internal or external reference capability.  
4. High speed parallel interface.  
Reference selection for AD7302 can be either an internal  
reference derived from the VDD or an external reference applied  
at the REFIN pin. Both DACs can be simultaneously updated  
using the asynchronous LDAC input and can be cleared by  
using the asynchronous CLR input.  
5. Power-Down Capability. When powered down the DAC  
consumes less than 1 µA at 25°C.  
6. Packaged in 20-lead DIP, SOIC and TSSOP packages.  
The low power consumption of this part makes it ideally suited  
to portable battery operated equipment. The power consump-  
tion is less than 10 mW at 3.3 V, reducing to 3 µW in power-  
down mode.  
The AD7302 is available in a 20-pin plastic dual-in-line package,  
20-lead SOIC and a 20-lead TSSOP package.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1997  

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