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AD721JP PDF预览

AD721JP

更新时间: 2024-01-24 04:57:51
品牌 Logo 应用领域
亚德诺 - ADI 编码器
页数 文件大小 规格书
8页 148K
描述
RGB to NTSC/PAL Encoders

AD721JP 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.73商用集成电路类型:COLOR SIGNAL ENCODER
输入类型:RGBJESD-30 代码:S-PQCC-J28
JESD-609代码:e0长度:11.5062 mm
功能数量:1端子数量:28
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):220
电源:+-5 V认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Color Signal Converters
最大压摆率:35 mA最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30视频标准:PAL; NTSC
宽度:11.5062 mmBase Number Matches:1

AD721JP 数据手册

 浏览型号AD721JP的Datasheet PDF文件第1页浏览型号AD721JP的Datasheet PDF文件第2页浏览型号AD721JP的Datasheet PDF文件第4页浏览型号AD721JP的Datasheet PDF文件第5页浏览型号AD721JP的Datasheet PDF文件第6页浏览型号AD721JP的Datasheet PDF文件第7页 
AD720/AD721  
ABSO LUTE MAXIMUM RATINGS*  
P IN D ESCRIP TIO NS  
Supply Voltage ±VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6 V  
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 600 mW  
Operating T emperature Range . . . . . . . . . . . . . . 0°C to +70°C  
Storage T emperature Range . . . . . . . . . . . . –65°C to +150°C  
Lead T emperature, Soldering 60 sec . . . . . . . . . . . . . . +300°C  
NOT E  
*Stresses above those listed under “Absolute Maximum Ratings” may cause  
permanent damage to the device. T his is a stress rating only, and functional  
operation of the device at these or any other conditions above those indicated in the  
operational section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended rating conditions for extended periods  
may affect device reliability.  
P in Mnem onic* D escription*  
1
2
3
4
5
(NC) GOUT (No Connection) Green Bypass Buffer  
(NC) APOS  
(NC) ROUT  
AGND  
(No Connection) Analog Positive Supply; +5 V ± 5%  
(No Connection) Red Bypass Buffer  
Analog Ground Connection  
ENCD  
A Logical High Enables the NT SC/PAL Encode  
Mode (A Logical Low Powers Down the Chip)  
A Logical Low Enables the RGB Bypass Mode  
Red Component Video Input  
0 mV to 714 mV for NT SC  
6
RDIN  
0 mV to 700 mV for PAL  
T hermal characteristics: 28-pin plastic package: θJA = 100°C.  
7
8
AGND  
GRIN  
Analog Ground Connection  
Green Component Video Input  
0 mV to 714 mV for NT SC  
O RD ERING GUID E  
0 mV to 700 mV for PAL  
9
AGND  
Analog Ground Connection  
Blue Component Video Input  
0 mV to 714 mV for NT SC  
Tem perature  
Range  
P ackage  
O ption  
10 BLIN  
Model  
P ackage  
0 mV to 700 mV for PAL  
AD720JP  
AD721JP  
0°C to +70°C  
0°C to +70°C  
28-Pin PLCC  
28-Pin PLCC  
P-28A  
P-28A  
11 ST ND  
A Logical High Input Selects NT SC Encoding  
A Logical Low Input Selects PAL Encoding  
CMOS Logic Levels  
12 AGND  
13 CRMA  
Analog Ground Connection  
P IN CO NNECTIO NS  
28-Lead P lastic Leaded Chip Car r ier (P LCC) P ackage  
P -28A  
Chrominance Output; Subcarrier Only**  
572 mV Peak-to-Peak for NT SC  
600 mV Peak-to-Peak for PAL  
Analog Positive Supply; +5 V ± 5%  
Composite Video Output**  
14 APOS  
15 CMPS  
–572 mV to 2 V for NT SC  
–600 mV to 2 V for PAL  
16 APOS  
17 LUMA  
Analog Positive Supply; +5 V ± 5%  
Luminance Plus SYNC Output**  
–572 mV to 1.43 V for NT SC  
–600 mV to 1.4 V for PAL  
System Negative Supply; –5 V ± 5%  
Digital Ground Connection  
Clock Input at Four T imes the Subcarrier Frequency  
14.318 180 MHz for NT SC  
17.734 480 MHz for PAL  
1
26  
4
3
2
28 27  
5
6
25  
24  
23  
22  
21  
20  
19  
DGND  
SYNC  
DPOS  
ASNC  
DPOS  
4FSC  
ENCD  
RDIN  
18 VNEG  
19 DGND  
20 4FSC  
7
AGND  
GRIN  
AGND  
BLIN  
AD720/AD721  
RGB TO NTSC/PAL  
ENCODER  
8
CMOS Logic Levels  
9
21 DPOS  
22 ASNC  
Digital Positive Supply; +5 V ± 5%  
A Logical High Input Resets the Subcarrier Phase  
Every Frame  
10  
STND 11  
DGND  
A Logical Low Input Resets the Subcarrier Phase  
Every Fourth Frame  
CMOS Logic Levels  
12  
13 14 15 16 17 18  
23 DPOS  
24 SYNC  
Digital Positive Supply; +5 V ± 5%  
Input for Composite T elevision  
Synchronization Pulses  
NOTE:  
CONNECTIONS IN ( ) PERTAIN ONLY TO AD720  
Negative Sync Pulses  
CMOS Logic Levels  
25 DGND  
26 VNEG  
27 (NC) BOUT  
28 APOS  
Digital Ground Connections (One of T wo)  
System Negative Supply; –5 V ± 5%  
(No Connection) Blue Bypass Buffer  
Analog Positive Supply; +5 V ± 5%  
*( ) pertain only to AD720.  
**T he luminance, chrominance, and composite outputs are at twice normal  
levels for driving 75 reverse-terminated lines.  
CAUTIO N  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection.  
Although the AD720/AD721 features proprietary ESD protection circuitry, permanent damage  
may occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD  
precautions are recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
REV. 0  
–3–  

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