AD678SD

更新时间： 2024-01-26 09:58:47

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
14页	310K
描述
12-Bit 200 kSPS Complete Sampling ADC

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AD678SD 数据手册

AD678–SPECIFICATIONS

(T_MINto T_MAX, V_CC= +12 V ؎ 5%, V_EE= –12 V ؎ 5%, V_DD= +5 V ؎ 10%, f_SAMPLE= 200 kSPS,

f = 10.06 kHz unless otherwise noted)¹

AC SPECIFICATIONS

AD678J/A/S

AD678K/B/T

Parameter

Min

Typ

Max

Min

Typ

Max

Units

SIGNAL-TO-NOISE AND DISTORTION (S/N+D) RATIO²

–0.5 dB Input (Referred to –0 dB Input)

–20 dB Input (Referred to –20 dB Input)

–60 dB Input (Referred to –60 dB Input)

TOTAL HARMONIC DISTORTION (THD)³

–88

0.004

–80

0.010

–88

0.004

–80

0.010

PEAK SPURIOUS OR PEAK HARMONIC COMPONENT

FULL POWER BANDWIDTH

–87

–80

–87

–80

MHz

kHz

FULL LINEAR BANDWIDTH

500

INTERMODULATION DISTORTION (IMD)⁴

2nd Order Products

3rd Order Products

–85

–90

–80

–85

–90

–80

NOTES

¹f_INamplitude = –0.5 dB (9.44 V p-p) bipolar mode full scale unless otherwise indicated. All measurements referred to a –0 dB (9.997 V p-p) input signal unless

otherwise indicated.

²See Figures 13 and 14 for higher frequencies and other input amplitudes.

³See Figure 12.

⁴f_A= 9.08 kHz, f_B= 9.58 kHz, with f_SAMPLE= 200 kSPS. See Definition of Specifications section and Figure 16.

Specifications subject to change without notice.

DIGITAL SPECIFICATIONS ^{(All device types T}_MINto T_MAX, V_CC= +12 V ؎ 5%, V_EE= –12 V ؎ 5%, V_DD= +5 V ؎ 10%)

Parameter

Test Conditions

Min

Max

Units

LOGIC INPUTS

V_IH

V_IL

I_IH

High Level Input Voltage

2.0

–10

V_DD

0.8

+10

µA

Low Level Input Voltage

High Level Input Current

Low Level Input Current

Input Capacitance

V_IN= V_DD

V_IN= 0 V

I_IL

C_IN

–10

LOGIC OUTPUTS

V_OH

High Level Output Voltage

I_OH= 0.1 mA

I_OH= 0.5 mA

I_OL= 1.6 mA

V_IN= 0 or V_DD

4.0

2.4

µA

V_OL

I_OZ

C_OZ

Low Level Output Voltage

High Z Leakage Current

High Z Output Capacitance

0.4

+10

–10

Specifications subject to change without notice.

–2–

REV. C

123 4 5 6 7...14

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