AD671JD-750

更新时间： 2024-01-23 17:57:57

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
16页	486K
描述
Monolithic 12-Bit 2 MHz A/D Converter

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数据手册

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AD671JD-750 数据手册

AD671–SPECIFICATIONS

(T_MINto T_MAXwith V_CC= +5 V ؎ 5%, V_LOGIC= +5 V ؎10%, V_EE= –5 V ؎ 5%, V_REF= +5.000 V,

unless otherwise noted)

DC SPECIFICATIONS

RESOLUTION

Bits

ACCURACY (+25°C)

Integral Nonlinearity (INL)

_MINto T_MAX

Differential Nonlinearity (DNL)

_MINto T_MAX

LSB

Bits

No Missing Codes

Unipolar Offset^l

Bipolar Zero^l

10 Bits Guaranteed

0.1

11 Bits Guaranteed

0.1

LSB

% FSR

Gain Error²

TEMPERATURE COEFFICIENTS³

Unipolar Offset

Bipolar Zero

ppm/°C

Gain Error

ANALOG INPUT

Input Ranges

Bipolar

Volts

Unipolar

Input Resistance

10 Volt Range

5 Volt Range

Input Capacitance

Reference Input Resistance

1.0

0.5

1.5

0.75

2.0

1.0

0.5

1.5

0.75

2.0

1.0

kΩ

2.4

3.5

4.7

2.4

3.5

4.7

POWER SUPPLIES

Power Supply Rejection⁴

V_CC(+5 V ± 0.25 V)

LSB

_LOGIC(+5 V ± 0.5 V)

_EE(–5 V ± 0.25 V)

Operating Voltages

V_CC

V_LOGIC

V_EE

Volts

Operating Current

I_CC

I_LOGIC

I_EE

POWER CONSUMPTION

475

TEMPERATURE RANGE

Specified (J/K)

Specified (S)

–55

+70

+125

+70

°C

NOTES

¹Adjustable to zero with external potentiometers. See Offset/Gain Calibration section for additional information.

²Full-scale range (FSR) is 5 V for the 0 V to 5 V range and 10 V for the 0 V to 10 V and –5 V to +5 V ranges.

³25°C to T_MINand 25°C to T_MAX

⁴Change in gain error as a function of the dc supply voltage.

⁵Tested under static conditions. See Figure 12 for typical curves of I_LOGICvs. Conversion Rate and Output Loading.

Specifications subject to change without notice.

Specifications shown in

are tested on all devices at final electrical test with worst case supply voltages at 0, +25°C and +70°C. Results from those tests are

used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested.

–2–

REV. B

123 4 5 6 7...16

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