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AD648JN

更新时间： 2024-01-30 19:53:39
品牌 Logo 应用领域
亚德诺 - ADI 运算放大器
页数 文件大小 规格书
12页 337K
描述
Dual Precision, Low Power BiFET Op Amp

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AD648JN 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：DIP
包装说明：CERDIP-8针数：8
Reach Compliance Code：unknown风险等级：5.04
放大器类型：OPERATIONAL AMPLIFIER最大平均偏置电流 (IIB)：0.000015 µA
最大输入失调电压：2000 µVJESD-30 代码：R-GDIP-T8
JESD-609代码：e0湿度敏感等级：NOT APPLICABLE
负供电电压上限：-18 V标称负供电电压 (Vsup)：-15 V
功能数量：2端子数量：8
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：5.08 mm
标称压摆率：1.8 V/us子类别：Operational Amplifier
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：NO技术：BIPOLAR
温度等级：MILITARY端子面层：TIN LEAD
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
标称均一增益带宽：1000 kHz宽度：7.62 mm
Base Number Matches：1

AD648JN 数据手册

 浏览型号AD648JN的Datasheet PDF文件第4页浏览型号AD648JN的Datasheet PDF文件第5页浏览型号AD648JN的Datasheet PDF文件第6页浏览型号AD648JN的Datasheet PDF文件第8页浏览型号AD648JN的Datasheet PDF文件第9页浏览型号AD648JN的Datasheet PDF文件第10页 
AD648  
Figure 23c shows a diode clamp protection scheme for an I-to-V  
converter using low leakage diodes. Because the diodes are con-  
nected to the op amp’s summing junction, which is a virtual  
ground, their leakage contribution is minimal.  
CMOS DAC’s output current to a voltage and provides the  
necessary level shifting to achieve a bipolar voltage output. T he  
circuit operates with a 12-bit plus sign input code. T he transfer  
function is shown in Figure 25.  
T he AD7592 is a fully protected dual CMOS SPDT switch with  
data latches. R4 and R5 should match to within 0.01% to main-  
tain the accuracy of the converter. A mismatch between R4 and  
R5 introduces a gain error. Overall gain is trimmed by adjusting  
R
IN. T he AD648’s low input offset voltage, low drift over tem-  
perature, and excellent dynamics make it an attractive low  
power output buffer.  
T he input offset voltage of the AD648 output amplifier results  
in an output error voltage. T his error voltage equals the input  
offset voltage of the op amp times the noise gain of the amplifier.  
Figure 23c. I-to-V Converter with Diode Input Protection  
Exceeding the negative common-mode range on either input  
terminal causes a phase reversal at the output, forcing the ampli-  
fier output to the corresponding high or low state. Exceeding  
the negative common mode on both inputs simultaneously  
forces the output high. Exceeding the positive common-mode  
range on a single input doesn’t cause a phase reversal; but if  
both inputs exceed the limit, the output will be forced high. In  
all cases, normal amplifier operation is resumed when input  
voltages are brought back within the common-mode range.  
T hat is:  
RFB  
VOS Output = VOS Input 1 +  
RO  
RFB is the feedback resistor for the op amp, which is internal to  
the DAC. RO is the DAC’s R-2R ladder output resistance. T he  
value of RO is code dependent. T his has the effect of changing  
the offset error voltage at the amplifier’s output. An output am-  
plifier with a sub millivolt input offset voltage is needed to pre-  
serve the linearity of the DAC’s transfer function.  
D /A CO NVERTER BIP O LAR O UTP UT BUFFER  
T he circuit in Figure 24 provides 4 quadrant multiplication with  
a resolution of 12 bits. The AD648 is used to convert the AD7545  
Figure 24. 12-Bit Plus Sign Magnitude D/A Converter  
SIGN BIT BINARY NUMBER IN DAC REGISTER ANALOG OUTPUT  
0
0
1
1
1111 1111 1111  
0000 0000 0000  
0000 0000 0000  
1111 1111 1111  
+VIN 
؋
 (4095/ 4096)  
0 VOLTS  
0 VOLTS  
–VIN 
؋
 (4095/ 4096)  
NOTE: SIGN BIT AT "0" CONNECTS THE NONINVERTING INPUT OF  
A2 TO ANALOG COMMON  
Figure 25. Sign Magnitude Code Table  
REV. C  
–7–  
1...45678910...12

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