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AD6438-2 PDF预览

AD6438-2

更新时间: 2024-01-09 22:18:25
品牌 Logo 应用领域
亚德诺 - ADI ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
28页 185K
描述
IC ATM NETWORK INTERFACE, PQFP144, LQFP-144, ATM/SONET/SDH IC

AD6438-2 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:144
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.82JESD-30 代码:S-PQFP-G144
长度:20 mm功能数量:1
端子数量:144最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH认证状态:Not Qualified
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:ATM/SONET/SDH NETWORK INTERFACE
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:20 mmBase Number Matches:1

AD6438-2 数据手册

 浏览型号AD6438-2的Datasheet PDF文件第2页浏览型号AD6438-2的Datasheet PDF文件第3页浏览型号AD6438-2的Datasheet PDF文件第4页浏览型号AD6438-2的Datasheet PDF文件第5页浏览型号AD6438-2的Datasheet PDF文件第6页浏览型号AD6438-2的Datasheet PDF文件第7页 
ATM Interface and Framer IC  
for ADSL Chipsets  
a
AD6438-2  
FEATURES  
GENERAL DESCRIPTION  
Component in Analog Devices’ AD20msp918 ADSL  
Chipset  
Suitable for CO (Central Office) or Residence (ATU-R  
and ATU-C)  
Designed to ANSI T1.413 Issue 2, ETSI TR238, ITU  
G.992.1 and G.992.2 Standards  
ATM Operation and Functionality as Defined by Issue 2  
ATM Mode and ADSL Forum  
Optional Serial Interface to Access the PMD Sublayer,  
Available on the AD6438-2, Not Available on the AD6438  
UTOPIA Level 1 and Level 2 Physical Interface  
Byte-Parallel or “Multi-PHY” for Dual Latency  
Implements Both Issue 1 and Issue 2 ADSL Framing  
Structure (Reduced Overhead)  
The AD6438-2 Interface and Framer IC is part of Analog Devices’  
AD20msp918 chipset, a flexible standards-based solution for  
creating high-performance, ATM-based, ADSL modems. The  
AD6438-2 is interoperable with the AD20msp910 ADSL chipset.  
The AD6438-2 interfaces an ADSL modem to an external sys-  
tem, at either CO (Central Office) or RT (Remote Terminal)  
modem, using a standard UTOPIA 1- or 2-port (byte-wide, Cell  
or Byte Mode). It inserts ATM cells into an ADSL line, with  
functions that correspond to the Transmission Convergence  
(TC) sublayer in the BISDN protocol reference model (per  
ITU-T I.432 and T1.413 Issue 2). These include cell delinea-  
tion, HEC generation, and cell-rate adaption, as defined by the  
ATM working group of the ADSL Forum and the RBB working  
group of the ATM Forum.  
144-Lead LQFP  
The AD6438-2 implements both standard and reduced-overhead  
framing per ANSI T1.413 Issue 2, and includes FEC (Forward  
Error-Correcting) Code and interleaving.  
–40؇C to +85؇C, 3.3 V Operation  
FUNCTIONAL BLOCK DIAGRAM  
35MHz SYSTEM  
AD6438-2  
TIMING  
OFFSET  
NTR  
8kHz  
NTR  
FAST  
F
ADSL  
Tx  
Rx  
FRAMER  
ATM  
UTOPIA 1/2  
INTERFACE  
FEC  
AD6439-2  
I
INTLV  
ISSUE  
1, 2  
ADDR  
CONTROL  
ADDRESS  
CONTROL  
D
A
ADTSP-2183  
INTERLEAVE RAM  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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