AD570JD

更新时间： 2024-02-18 13:43:26

品牌	Logo	应用领域
亚德诺 - ADI		转换器模数转换器 PC
页数	文件大小	规格书
8页	314K
描述
Complete 8-Bit A-to-D Converter

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AD570JD 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	DIP,	针数：	18
Reach Compliance Code：	unknown	风险等级：	5.78
Is Samacsys：	N	最大模拟输入电压：	5 V
最小模拟输入电压：	-5 V	最长转换时间：	40 µs
转换器类型：	ADC, SUCCESSIVE APPROXIMATION	JESD-30 代码：	R-CDIP-T18
JESD-609代码：	e0	湿度敏感等级：	NOT SPECIFIED
标称负供电电压：	-15 V	模拟输入通道数量：	1
位数：	8	功能数量：	1
端子数量：	18	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出位码：	BINARY, OFFSET BINARY
输出格式：	PARALLEL, 8 BITS	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
采样速率：	0.04 MHz	座面最大高度：	5.08 mm
标称供电电压：	5 V	表面贴装：	NO
温度等级：	MILITARY	端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm	Base Number Matches：	1

AD570JD 数据手册

AD570

ZERO OFFSET

The apparent zero point of the AD570 can be adjusted by in-

serting an offset voltage between the analog common of the de-

vice and the actual signal return or signal common. Figure 7

illustrates two methods of providing this offset. Figure 7a shows

how the converter zero may be offset by up to ±3 bits to correct

the device initial offset and/or input signal offsets. As shown, the

circuit gives approximately symmetrical adjustment in unipolar

mode. In bipolar mode R2 should be omitted to obtain a sym-

metrical range.

Figure 7a.

Figure 8. AD570 Transfer Curve—Unipolar Operation

(Approximate Bit Weights Shown for Illustration, Nominal

Bit Weights ϳ 36.1 mV)

NOTE: During a conversion transient currents from the analog

common terminal will disturb the offset voltage. Capacitive de-

coupling should not be used around the offset network. These

transients will settle as appropriate during a conversion. Capaci-

tive decoupling will “pump up” and fail to settle resulting in

conversion errors. Power supply decoupling which returns to

analog signal common should go to the signal input side of the

resistive offset network.

Figure 7b.

Figure 8 shows the nominal transfer curve near zero for an

AD570 in unipolar mode. The code transitions are at the edges

of the nominal bit weights. In some applications it will be pref-

erable to offset the code transitions so that they fall between the

nominal bit weights, as shown in the offset characteristics. This

offset can easily be accomplished as shown in Figure 7b.

CONTROL AND TIMING OF THE AD570

There are several important timing and control features on the

AD570 which must be understood precisely to allow optimal

interfacing to microprocessor or other types of control systems.

All of these features are shown in the timing diagram in Figure 9.

The normal standby situation is shown at the left end of the

drawing. The BLANK and CONVERT (B & C) line is held

high, the output lines will be “open”, and the DATA READY

(DR) line will be high. This mode is the lowest power state of

the device (typically 150 mW). When the (B & C ) line is

brought low, the conversion cycle is initiated; but the DR and

data lines do not change state. When the conversion cycle is

complete (typically 25 µs), the DR line goes low, and within

500 ns, the data lines become active with the new data.

At balance (after a conversion) approximately 2 mA flows into

the analog common terminal. A 10 Ω resistor in series with this

terminal will result in approximately the desired 1/2 bit offset of

the transfer characteristics. The nominal 2 mA analog common

current is not closely controlled in manufacture. If high accuracy

is required, a 20 Ω potentiometer (connected as a rheostat) can

be used as R1. Additional negative offset range may be obtained

by using larger values of R1. Of course, if the zero transition

point is changed, the full-scale transition point will also move.

Thus, if an offset of 1/2 LSB is introduced, full-scale trimming

as described on previous page should be done with an analog

input of 9.941 volts.

About 1.5 µs after the B & C line is again brought high, the DR

line will go high and the data lines will go open. When the

B & C line is again brought low, a new conversion will begin.

The minimum pulse width for the B & C line to blank previous

data and start a new conversion is 2 µs. If the B & C line is

brought high during a conversion, the conversion will stop, and

REV. A

–5–

1 2 3 456 7 8

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