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AD568S

更新时间: 2024-01-13 01:24:00
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
14页 543K
描述
12-Bit Ultrahigh Speed Monolithic D/A Converter

AD568S 数据手册

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12-Bit Ultrahigh Speed  
Monolithic D/A Converter  
a
AD568  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Ultrahigh Speed: Current Settling to 1 LSB in 35 ns  
High Stability Buried Zener Reference on Chip  
Monotonicity Guaranteed Over Temperature  
10.24 mA Full-Scale Output Suitable for Video  
Applications  
Integral and Differential Linearity Guaranteed Over  
Temperature  
0.3" “Skinny DIP” Packaging  
Variable Threshold Allows TTL and CMOS  
Interface  
MIL-STD-883 Compliant Versions Available  
PRODUCT DESCRIPTION  
PRODUCT HIGHLIGHTS  
The AD568 is an ultrahigh-speed, 12-bit digital-to-analog con-  
verter (DAC) settling to 0.025% in 35 ns. The monolithic de-  
vice is fabricated using Analog Devices’ Complementary Bipolar  
(CB) Process. This is a proprietary process featuring high-speed  
NPN and PNP devices on the same chip without the use of di-  
electric isolation or multichip hybrid techniques. The high speed  
of the AD568 is maintained by keeping impedance levels low  
enough to minimize the effects of parasitic circuit capacitances.  
1. The ultrafast settling time of the AD568 allows leading edge  
performance in waveform generation, graphics display and  
high speed A/D conversion applications.  
2. Pin strapping provides a variety of voltage and current output  
ranges for application versatility. Tight control of the abso-  
lute output current reduces trim requirements in externally-  
scaled applications.  
3. Matched on-chip resistors can be used for precision scaling in  
high speed A/D conversion circuits.  
The DAC consists of 16 current sources configured to deliver a  
10.24 mA full-scale current. Multiple matched current sources  
and thin-film ladder techniques are combined to produce bit  
weighting. The DAC’s output is a 10.24 mA full scale (FS) for  
current output applications or a 1.024 V FS unbuffered voltage  
output. Additionally, a 10.24 V FS buffered output may be gen-  
erated using an onboard 1 kspan resistor with an external op  
amp. Bipolar ranges are accomplished by pin strapping.  
4. The digital inputs are compatible with TTL and +5 V  
CMOS logic families.  
5. Skinny DIP (0.3") packaging minimizes board space require-  
ments and eases layout considerations.  
6. The AD568 is available in versions compliant with MIL-  
STD-883. Refer to the Analog Devices Military Products  
Databook or current AD568/883B data sheet for detailed  
specifications.  
Laser wafer trimming insures full 12-bit linearity. All grades of  
the AD568 are guaranteed monotonic over their full operating  
temperature range. Furthermore, the output resistance of the  
DAC is trimmed to 100 Ω ± 1.0%. The gain temperature coeffi-  
cient of the voltage output is 30 ppm/°C max (K).  
The AD568 is available in three performance grades. The  
AD568JQ and KQ are available in 24-pin cerdip (0.3") packages  
and are specified for operation from 0°C to +70°C. The  
AD568SQ features operation from –55°C to +125°C and is also  
packaged in the hermetic 0.3" cerdip.  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  

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