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AD5691RBRMZ-RL7 PDF预览

AD5691RBRMZ-RL7

更新时间: 2024-11-01 00:56:51
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亚德诺 - ADI /
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描述
Tiny 16-/14-/12-Bit I2C nanoDAC

AD5691RBRMZ-RL7 数据手册

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Tiny 16-/14-/12-Bit I2C nanoDAC+, with  
2 LSB INL (16-Bit) and 2 ppm/°C Reference  
AD5693R/AD5692R/AD5691R/AD5693  
FUNCTIONAL BLOCK DIAGRAM  
Data Sheet  
FEATURES  
V
V
V
DD  
LOGIC  
REF  
Ultrasmall package: 2 mm × 2 mm, 8-lead LFCSP  
High relative accuracy (INL): 2 LSB maximum at 16 bits  
AD5693R/AD5692R/AD5691R  
Low drift, 2.5 V reference: 2 ppm/°C typical  
Selectable span output: 2.5 V or 5 V  
AD5693  
POWER-ON  
RESET  
AD5693R/  
AD5692R/  
AD5691R  
2.5V  
REF  
LDAC  
REF  
DAC  
REGISTER  
OUTPUT  
BUFFER  
V
16-/14-/12-BIT  
DAC  
OUT  
RESET  
External reference only  
Selectable span output: VREF or 2 × VREF  
Total unadjusted error (TUE): 0.06% of FSR maximum  
Offset error: 1.5 mV maximum  
Gain error: 0.05 % of FSR maximum  
Low glitch: 0.1 nV-sec  
INPUT  
POWER-DOWN  
RESISTOR  
NETWORK  
CONTROL LOGIC  
CONTROL LOGIC  
SDA  
SCL  
A0  
GND  
High drive capability: 20 mA  
Low power: 1.2 mW at 3.3 V  
1.8 V VLOGIC compatible  
Figure 1. MSOP  
1
LDAC OR V  
OR RESET  
V
V
DD  
LOGIC  
REF  
Wide operating temperature range: −40°C to +105°C  
AD5693R/  
AD5692R/  
AD5691R/  
AD5693  
2
POWER-ON  
2.5V REF  
RESET  
APPLICATIONS  
Process controls  
REF  
DAC  
REGISTER  
OUTPUT  
BUFFER  
Data acquisition systems  
Digital gain and offset adjustment  
Programmable voltage sources  
Optical modules  
V
OUT  
16-/14-/12-BIT  
DAC  
INPUT  
CONTROL LOGIC  
POWER-DOWN  
CONTROL LOGIC  
RESISTOR  
NETWORK  
GENERAL DESCRIPTION  
The AD5693R/AD5692R/AD5691R/AD5693, members of the  
nanoDAC+® family, are low power, single-channel, 16-/14-/12-bit  
buffered voltage output DACs. The devices, except the AD5693,  
include an enabled by default internal 2.5 V reference, offering  
2 ppm/°C drift. The output span can be programmed to be 0 V to  
SDA  
SCL  
A0  
GND  
1
NOT ALL PINS AVAILABLE IN ALL 8-LEAD LFCSP MODELS.  
NOT AVAILABLE IN THE AD5693.  
2
Figure 2. LFCSP  
VREF or 0 V to 2 × VREF. All devices operate from a single 2.7 V to  
5.5 V supply and are guaranteed monotonic by design. The  
devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or  
a 10-lead MSOP.  
Table 1. Related Devices  
Interface  
Reference 16-Bit  
14-Bit  
12-Bit  
SPI  
Internal  
External  
Internal  
External  
AD5683R AD5682R AD5681R  
AD5683  
The internal power-on reset circuit ensures that the DAC register  
is written to zero scale at power-up while the internal output  
buffer is configured in normal mode. The AD5693R/AD5692R/  
AD5691R/AD5693 contain a power-down mode that reduces the  
current consumption of the device to 2 µA (maximum) at 5 V and  
provides software selectable output loads.  
I2C  
AD5693R AD5692R AD5691R  
AD5693  
PRODUCT HIGHLIGHTS  
1. High relative accuracy (INL): 2 LSB maximum  
(AD5693R/AD5693, 16-bit).  
2. Low drift, 2.5 V on-chip reference: 2 ppm/°C typical and  
5 ppm/°C maximum temperature coefficient.  
3. 2 mm × 2 mm, 8-lead LFCSP and 10-lead MSOP.  
The AD5693R/AD5692R/AD5691R/AD5693 use an I2C  
interface. Some device options also include an asynchronous  
RESET  
pin and a VLOGIC pin, allowing 1.8 V compatibility.  
Rev. D  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2014–2017 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
 

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