AD532JDZ

更新时间： 2024-01-27 08:45:36

品牌	Logo	应用领域
亚德诺 - ADI		模拟计算功能信号电路
页数	文件大小	规格书
17页	521K
描述
Internally Trimmed Integrated Circuit Multiplier

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AD532JDZ 技术参数

Source Url Status Check Date：	2013-05-01 14:56:12.241	是否无铅：	含铅
是否Rohs认证：	不符合	生命周期：	Not Recommended
零件包装代码：	SMT	包装说明：	TO-100, CAN10,.23
针数：	10	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	7.53	模拟集成电路 - 其他类型：	ANALOG MULTIPLIER OR DIVIDER
标称带宽：	1 MHz	JESD-30 代码：	O-MBCY-W10
JESD-609代码：	e0	负电源电压最大值（Vsup）：	-22 V
负电源电压最小值（Vsup）：	-10 V	标称负供电电压 (Vsup)：	-15 V
最大负输入电压：	-10 V	功能数量：	1
端子数量：	10	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	METAL
封装代码：	TO-100	封装等效代码：	CAN10,.23
封装形状：	ROUND	封装形式：	CYLINDRICAL
峰值回流温度（摄氏度）：	NOT APPLICABLE	最大正输入电压：	10 V
电源：	+-15 V	认证状态：	Not Qualified
子类别：	Analog Computational Functions	最大供电电流 (Isup)：	6 mA
最大供电电压 (Vsup)：	22 V	最小供电电压 (Vsup)：	10 V
标称供电电压 (Vsup)：	15 V	表面贴装：	NO
温度等级：	MILITARY	端子面层：	Tin/Lead (Sn63Pb37)
端子形式：	WIRE	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT APPLICABLE	Base Number Matches：	1

AD532JDZ 数据手册

Internally Trimmed

Integrated Circuit Multiplier

AD532

FUNCTIONAL BLOCK DIAGRAM

FEATURES

Pretrimmed to 1.0% (AD532K)

No external components required

Guaranteed 1.0% maximum 4-quadrant error (AD532K)

Differential Inputs for (X₁− X₂) (Y₁− Y₂)/10 V transfer

function

OUTPUT

10R

Monolithic construction, low cost

(X – X ) (Y – Y )

APPLICATIONS

OUT

10V

Multiplication, division, squaring, square rooting

Algebraic computation

(WITH Z TIED TO OUTPUT)

Figure 1.

Power measurements

Instrumentation applications

Available in chip form

well qualified for instrumentation applications, as it can provide

an output signal that is the product of two transducer generated

input signals.

GENERAL DESCRIPTION

The AD532 is the first pretrimmed single chip monolithic

multiplier/divider. It guarantees a maximum multiplying error

of ±1.0% and a ±10 V output voltage without the need for any

external trimming resistors or output op amp. Because the AD532

is internally trimmed, its simplicity of use provides design

engineers with an attractive alternative to modular multipliers,

and its monolithic construction provides significant advantages

in size, reliability and economy. Further, the AD532 can be used

as a direct replacement for other IC multipliers that require

external trim networks.

GUARANTEED PERFORMANCE OVER

TEMPERATURE

The AD532J and AD532K are specified for maximum multiplying

errors of ±2% and ±1% of full scale, respectively at 25°C, and

are rated for operation from 0°C to 70°C. The AD532S has a

maximum multiplying error of ±1% of full scale at 25°C; it is

also 100% tested to guarantee a maximum error of ±4% at the

extended operating temperature limits of −55°C and +125°C.

All devices are available in either the hermetically-sealed TO-

100 metal can, TO-116 ceramic DIP or LCC packages. The J, K,

and S grade chips are also available.

FLEXIBILITY OF OPERATION

The AD532 multiplies in four quadrants with a transfer function of

(X₁− X₂)(Y₁− Y₂)/10 V, divides in two quadrants with a 10 V

Z/(X₁− X₂) transfer function, and square roots in one quadrant

ADVANTAGES OF ON-THE-CHIP TRIMMING OF

THE MONOLITHIC AD532

10 V Z

with a transfer function of ±±

. In addition to these basic

functions, the differential X and Y inputs provide significant

operating flexibility both for algebraic computation and transducer

instrumentation applications. Transfer functions, such as XY/10 V,

(X²− Y²)/1 0 V, ±X²/10 V, and 10 V Z/(X₁− X₂), are easily attained

and are extremely useful in many modulation and function

generation applications, as well as in trigonometric calculations

for airborne navigation and guidance applications, where the

monolithic construction and small size of the AD532 offer

considerable system advantages. In addition, the high CMRR

(75 dB) of the differential inputs makes the AD532 especially

1. True ratiometric trim for improved power supply rejection.

2. Reduced power requirements since no networks across

supplies are required.

3. More reliable because standard monolithic assembly

techniques can be used rather than more complex hybrid

approaches.

4. High impedance X and Y inputs with negligible circuit

5. Differential X and Y inputs for noise rejection and additional

computational flexibility.

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibilityis assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

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AD532JH	ADI	Internally Trimmed Integrated Circuit Multiplier	获取价格
AD532JH/+	ADI	AD532JH/+	获取价格
AD532JHZ	ADI	Internally Trimmed Integrated Circuit Multiplier	获取价格
AD532K	ADI	Internally Trimmed Integrated Circuit Multiplier	获取价格
AD532KCHIPS	ADI	AD532KCHIPS	获取价格
AD532KD	ADI	Internally Trimmed Integrated Circuit Multiplier	获取价格

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