Datasheet > AD5308_11

AD5308_11

更新时间： 2022-04-11 23:58:21

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
28页	408K
描述
2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP

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AD5308_11 数据手册

AD5308/AD5318/AD5328

A Version¹

Typ

B Version¹

Typ

Parameter²

Min

Max

Min

Max

Unit

μs

Conditions/Comments

V_DD= 5 V

V_DD= 3 V

Coming out of power-down

mode, V_DD= 5 V

Short Circuit Current

25.0

1ꢁ.0

2.5

25.0

1ꢁ.0

2.5

Power-Up Time

5.0

μs

Coming out of power-down

mode, V_DD= 3 V

LOGIC INPUTS^ꢁ

Input Current

V_IL, Input Low Voltage

0.8

0.ꢀ

0.8

0.ꢀ

μA

V_DD= 5 V 10%

V_DD= 3 V 10%

V_DD= 2.5 V

V_IH, Input High Voltage

1.ꢀ

2.5

1.ꢀ

2.5

V_DD= 2.5 V to 5.5 V, TTL and

CMOS compatible

Pin Capacitance

POWER REQUIREMENTS

V_DD

3.0

5.5

I_DD(Normal Mode)⁸

V_DD= 4.5 V to 5.5 V

V_IH= V_DDand V_IL= GND

All DACs in unbuffered

mode, in buffered mode

Extra current is typically x μA

per DAC; x = (5 μA +

V_REF/R_DAC)/4

1.0

0.ꢀ

1.8

1.5

1.0

0.ꢀ

1.8

1.5

V_DD= 2.5 V to 3.ꢁ V

I_DD(Power-Down Mode)⁹

V_DD= 4.5 V to 5.5 V

V_IH= V_DDand V_IL= GND

0.4

0.12

0.4

0.12

μA

V_DD= 2.5 V to 3.ꢁ V

¹Temperature range (A, B version): −40°C to +125°C; typical at 25°C.

²See the Terminology section.

³DC specifications tested with the outputs unloaded unless stated otherwise.

⁴Linearity is tested using a reduced code range: AD5308 (Code 8 to Code 255), AD5318 (Code 28 to Code 1023), and AD5328 (Code 115 to Code 4095).

⁵This corresponds to x codes. x = deadband voltage/LSB size.

^ꢁGuaranteed by design and characterization; not production tested.

^ꢀFor the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, V_REF= V_DDand offset plus

gain error must be positive.

⁸Interface inactive. All DACs active. DAC outputs unloaded.

⁹All eight DACs powered down.

V_DD= 2.5 V to 5.5 V; R_L= 2 kΩ to GND; C_L= 200 pF to GND; all specifications T_MINto T_MAX, unless otherwise noted.

Table 2. AC Characteristics¹

A, B Version²

Parameter³

Min

Typ

Max

Unit

Conditions/Comments

Output Voltage Settling Time

AD5308

AD5318

V_REF= V_DD= 5 V

ꢁ

ꢀ

μs

1/4 scale to 3/4 scale change (0x40 to 0xC0)

1/4 scale to 3/4 scale change (0x100 To 0x300)

1/4 scale to 3/4 scale change (0x400 to 0xC00)

AD5328

Slew Rate

0.ꢀ

0.5

200

−ꢀ0

V/μs

nV-sec

kHz

Major-Code Change Glitch Energy

Digital Feedthrough

Digital Crosstalk

Analog Crosstalk

DAC-to-DAC Crosstalk

Multiplying Bandwidth

Total Harmonic Distortion

1 LSB change around major carry

V_REF= 2 V 0.1 V p-p, unbuffered mode

V_REF= 2.5 V 0.1 V p-p, frequency = 10 kHz

¹Guaranteed by design and characterization; not production tested.

²Temperature range (A, B version): –40°C to +125°C; typical at 25°C.

³See the Terminology section.

Rev. F | Page 5 of 28

1 2 3 456 7 8...28

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与AD5308_11相关器件

型号	品牌	描述	获取价格	数据表
AD5308ARU	ADI	2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP	获取价格
AD5308ARU-REEL7	ADI	2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP	获取价格
AD5308ARUZ	ADI	2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP	获取价格
AD5308ARUZ-REEL7	ADI	2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP	获取价格
AD5308BRU	ADI	2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP	获取价格
AD5308BRU-REEL	ADI	2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP	获取价格

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