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AD5282BRU50 PDF预览

AD5282BRU50

更新时间: 2024-01-29 06:25:26
品牌 Logo 应用领域
亚德诺 - ADI 转换器电位器电阻器光电二极管
页数 文件大小 规格书
10页 154K
描述
+15V, I2C Compatible Digital Potentiometers

AD5282BRU50 技术参数

Source Url Status Check Date:2013-05-01 14:56:11.546是否无铅: 含铅
是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:MO-153AB, TSSOP-16
针数:16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.34其他特性:CAN ALSO OPERATE FROM A SINGLE +5V TO +15V SUPPLY; ALSO REQUIRES A +2.7V TO +5.5V LOGIC SUPPLY
标称带宽:0.15 kHz控制接口:2-WIRE SERIAL
转换器类型:DIGITAL POTENTIOMETERJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:5 mm
湿度敏感等级:1标称负供电电压:-5 V
功能数量:2位置数:256
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:5/15/+-5 V
认证状态:Not Qualified电阻定律:LINEAR
最大电阻容差:30%最大电阻器端电压:5 V
最小电阻器端电压:-5 V座面最大高度:1.2 mm
子类别:Digital Potentiometers标称供电电压:5 V
表面贴装:YES标称温度系数:30 ppm/ °C
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
标称总电阻:50000 Ω宽度:4.4 mm
Base Number Matches:1

AD5282BRU50 数据手册

 浏览型号AD5282BRU50的Datasheet PDF文件第4页浏览型号AD5282BRU50的Datasheet PDF文件第5页浏览型号AD5282BRU50的Datasheet PDF文件第6页浏览型号AD5282BRU50的Datasheet PDF文件第7页浏览型号AD5282BRU50的Datasheet PDF文件第9页浏览型号AD5282BRU50的Datasheet PDF文件第10页 
PRELIMINARY TECHNICAL DATA  
AD5280/AD5282  
V
= 3.3V  
V
= 5V  
DD2  
DD1  
condition, Figure 2. In Read mode, the master will issue a  
No Acknowledge for the 9th clock pulse (i.e., the SDA line  
remains high). The master will then bring the SDA line low  
before the 10th clock pulse which goes high to establish a  
STOP condition, Figure 3.  
Rp  
Rp  
Rp  
Rp  
S
G
G
D
S
SDA1  
SCL1  
SDA2  
SCL2  
A repeated Write function gives the user flexibility to update the  
RDAC output a number of times after addressing and instructing  
the part only once. During the Write cycle, each Data byte will  
update the RDAC output. For example, after the RDAC has  
acknowledged its Slave Address and Instruction Bytes, the  
RDAC output will update after these two bytes. If another byte  
is written to the RDAC while it is still addressed to a specific  
slave device with the same instruction, this byte will update the  
output of the selected slave device. If different instructions are  
needed, the Write mode has to start with a new Slave Address,  
Instruction, and Data Bytes again. Similarly, a repeated Read  
function of the RDAC is also allowed.  
M1  
D
M2  
3.3V  
5V  
AD5282  
2
E
PROM  
Figure 6. Level Shift for different potential operation.  
All digital inputs are protected with a series input resistor and  
parallel Zener ESD structures shown in figure 7. Applies to  
digital input pins SDA, SCL, and SHDN.  
MULTIPLE DEVICES ON ONE BUS  
340  
Figure 5 shows four AD5282 devices on the same serial bus.  
Each has a different slave address sine the state of their AD0 and  
AD1 pins are different. This allows each RDAC within each  
device to be written to or read from independently. The master  
device output bus line drivers are open-drain pull downs in a  
fully I2C compatible interface.  
LOGIC  
VSS  
Figure 7. ESD Protection of digital pins  
A,B,W  
+5V  
Rp  
Rp  
V
SS  
SDA  
SCL  
Figure 8. ESD Protection of Resistor Terminals  
MASTER  
VDD  
VDD  
VDD  
SDA SCL  
AD1  
SDA SCL  
AD1  
SDA SCL  
AD1  
SDA SCL  
AD1  
AD0  
AD0  
AD0  
AD0  
AD5282  
AD5282  
AD5282  
AD5282  
Figure 5. Multiple AD5282 Devices on One Bus  
LEVEL SHIFT FOR BI-DIRECTIONAL INTERFACE  
While most old systems may be operated at one voltage, a new  
component may be optimized at another. When two systems  
operate the same signal at two different voltages, proper method  
of level shifting is needed. For instance, one can use a 3.3V  
E2PROM to interface with a 5V digital potentiometer. A level  
shift scheme is needed in order to enable a bi-directional  
communication so that the setting of the digital potentiometer  
can be stored to and retrieved from the E2PROM. Figure 6  
shows one of the techniques. M1 and M2 can be N-Ch FETs  
2N7002 or low threshold FDV301N if VDD falls below 2.5V.  
8
REV PrE 12 MAR 02  
Information contained in this Product Concept Data Sheet describes a product in the early definition stage. There is no guarantee that the information contained here will become a final  
product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara, CA. TEL 408 382-3107; FAX 408 382-2721; email; walt.heinzer@analog.com  

AD5282BRU50 替代型号

型号 品牌 替代类型 描述 数据表
AD5282BRUZ50 ADI

完全替代

Single/Dual, +15 V/±5 V, 256-Position, I2C-Co

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