Datasheet > AD5282BRU20

AD5282BRU20

更新时间： 2024-02-12 21:06:59

品牌	Logo	应用领域
亚德诺 - ADI		电位器
页数	文件大小	规格书
10页	154K
描述
+15V, I2C Compatible Digital Potentiometers

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AD5282BRU20 数据手册

PRELIMINARY TECHNICAL DATA

AD5280/AD5282

ELECTRICAL CHARACTERISTICS 20K, 50K, 200K OHM VERSION ^(V_DD= +5V, V_SS= -5V, V_LOGIC= +5V,

_A= +V_DD, V_B= 0V, -40°C < T_A< +85°C unless otherwise noted.)

Parameter

Symbol

Conditions

Min

Typ¹

Max

Units

DYNAMIC CHARACTERISTICS^6,9,11

Bandwidth –3dB

BW_20K

BW_50K

R_AB= 20KΩ, Code = 80_H

R_AB= 50KΩ, Code = 80_H

650

142

0.005

kHz

BW_200K R_AB= 200KΩ, Code = 80_H

THD_W

t_S

Total Harmonic Distortion

V_WSettling Time

V_A=1Vrms + 2V dc, V_B= 2V DC, f=1KHz

V_A= V_DD, V_B=0V, ±1 LSB error band

µs

Resistor Noise Voltage

e_{N_WB}

R_WB= 10KΩ, f = 1KHz

nV√Hz

INTERFACE TIMING CHARACTERISTICS applies to all parts(Notes 6,12)

SCL Clock Frequency

f_SCL

400

0.9

KHz

µs

t_BUFBus free time between STOP & START

t_HD;STAHold Time (repeated START)

t_LOWLow Period of SCL Clock

t_HIGHHigh Period of SCL Clock

t_SU;STASetup Time For START Condition t5

t_HD;DATData Hold Time

t_SU;DATData Setup Time

t_FFall Time of both SDA & SCL signals

t_RRise Time of both SDA & SCL signals t9

1.3

0.6

1.3

0.6

After this period the first clock pulse is generated

100

300

t_SU;STOSetup time for STOP Condition

t10

0.6

µs

NOTES:

Typicals represent average readings at +25°C, V_DD= +5V, V_SS= -5V.

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the

relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

V_AB= V_DD, Wiper (V_W) = No connect

INL and DNL are measured at V_Wwith the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V_A= V_DDand V_B= 0V.

DNL specification limits of ±1LSB maximum are Guaranteed Monotonic operating conditions.

Resistor terminals A,B,W have no limitations on polarity with respect to each other.

Guaranteed by design and not subject to production test.

Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth. The highest R value

result in the minimum overall power consumption.

10.

is calculated from (I x V ). CMOS logic level inputs result in minimum power dissipation.

DISS

DD DD

11. All dynamic characteristics use V_DD= +5V.

12. See timing diagram for location of measured values.

REV PrE 12 MAR 02

Information contained in this Product Concept Data Sheet describes a product in the early definition stage. There is no guarantee that the information contained here will become a final

product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara, CA. TEL 408 382-3107; FAX 408 382-2721; email; walt.heinzer@analog.com

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AD5282BRU200	ADI	+15V, I2C Compatible Digital Potentiometers	获取价格
AD5282BRU200	ROCHESTER	DUAL 200K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO16, M	获取价格
AD5282BRU200-REEL7	ADI	Single/Dual,15 V/5 V,256-Position I2C-Compatible Digital Potentiometer	获取价格
AD5282BRU20-REEL7	ADI	Single/Dual,15 V/5 V,256-Position I2C-Compatible Digital Potentiometer	获取价格
AD5282BRU50	ADI	+15V, I2C Compatible Digital Potentiometers	获取价格
AD5282BRU50	ROCHESTER	DUAL 50K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO16, MO	获取价格

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