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AD5263BRUZ20-REEL7 PDF预览

AD5263BRUZ20-REEL7

更新时间： 2024-01-18 17:23:11
品牌 Logo 应用领域
亚德诺 - ADI 转换器电位器数字电位计电阻器光电二极管
页数 文件大小 规格书
28页 624K
描述
Quad, 15 V, 256-Position, Digital Potentiometer with Pin-Selectable SPI/I2C

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AD5263BRUZ20-REEL7 技术参数

是否无铅：含铅是否Rohs认证：符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP24,.25针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.14
Is Samacsys：N其他特性：CAN ALSO OPERATE FROM 5 TO 15V SINGLE SUPPLY; 2-WIRE SERIAL CONTROL INTERFACE IS ALSO POSSIBLE
标称带宽：0.3 kHz控制接口：3-WIRE SERIAL
转换器类型：DIGITAL POTENTIOMETERJESD-30 代码：R-PDSO-G24
JESD-609代码：e3长度：7.8 mm
湿度敏感等级：1标称负供电电压：-5 V
功能数量：4位置数：256
端子数量：24最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：5/15/+-5 V
认证状态：Not Qualified电阻定律：LINEAR
最大电阻容差：30%最大电阻器端电压：7.5 V
最小电阻器端电压：-4.5 V座面最大高度：1.2 mm
子类别：Digital Potentiometers标称供电电压：5 V
表面贴装：YES标称温度系数：30 ppm/ °C
温度等级：AUTOMOTIVE端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
标称总电阻：20000 Ω宽度：4.4 mm
Base Number Matches：1

AD5263BRUZ20-REEL7 数据手册

 浏览型号AD5263BRUZ20-REEL7的Datasheet PDF文件第1页浏览型号AD5263BRUZ20-REEL7的Datasheet PDF文件第2页浏览型号AD5263BRUZ20-REEL7的Datasheet PDF文件第3页浏览型号AD5263BRUZ20-REEL7的Datasheet PDF文件第5页浏览型号AD5263BRUZ20-REEL7的Datasheet PDF文件第6页浏览型号AD5263BRUZ20-REEL7的Datasheet PDF文件第7页 
AD5263  
Data Sheet  
Parameter  
Symbol  
Conditions  
Min  
Typ 1  
Max  
Unit  
POWER SUPPLIES  
Logic Supply8  
VL  
VDD RANGE  
VDD/SS RANGE  
IL  
IDD  
ISS  
PDISS  
2.7  
4.5  
4.5  
5.5  
16.5  
7.5  
60  
1
V
V
V
µA  
µA  
µA  
mW  
Power Single-Supply Range  
Power Dual-Supply Range  
Logic Supply Current9  
Positive Supply Current  
Negative Supply Current  
Power Dissipation10  
VSS = 0 V  
VL = +5 V  
VIH = +5 V or VIL = 0 V  
VSS = –5 V  
VIH = +5 V or VIL = 0 V, VDD  
+5 V, VSS = –5 V  
25  
1
0.6  
=
Power Supply Sensitivity  
DYNAMIC CHARACTERISTICS6, 11  
Bandwidth (3 dB)  
PSS  
∆VDD = +5 V 10%  
0.002  
0.01  
%/%  
BW  
THDW  
RAB = 20 kΩ/50 kΩ/200 kΩ  
VA = 1 V rms, VB = 0 V, f = 1 kHz,  
300/150/35  
0.05  
kHz  
%
Total Harmonic Distortion  
R
AB = 20 kΩ  
VW Settling Time12  
tS  
VA = 10 V, VB = 0 V, 1 LSB error  
band  
2
9
µs  
Resistor Noise Voltage  
eN_WB  
RWB = 10 kΩ, f = 1 kHz, RS = 0  
Hz  
nV/√  
1 Typicals represent average readings at +25°C and VDD = +5 V, VSS = −5 V.  
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper  
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. IW = VDD/R for both VDD = +5 V and  
VSS = –5 V.  
3 VAB = VDD, Wiper (VW) = no connect.  
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits  
of 1 LSB maximum are guaranteed monotonic operating conditions.  
5 The A, B, and W resistor terminals have no limitations on polarity with respect to each other.  
6 Guaranteed by design and not subject to production test.  
7 Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.  
8 VL is limited to VDD or 5.5 V, whichever is less.  
9 Worst-case supply current consumed when all logic-input levels set at 2.4 V, standard characteristic of CMOS logic.  
10  
P
is calculated from IDD × VDD. CMOS logic level inputs result in minimum power dissipation.  
DISS  
11 All dynamic characteristics use VDD = +5 V, VSS = −5 V, VL = +5 V.  
12 Settling time depends on value of VDD, RL, and CL.  
Rev. F | Page 4 of 28  
 
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