AD5252BRU50

更新时间： 2024-02-12 15:16:59

品牌	Logo	应用领域
亚德诺 - ADI		电位器存储
页数	文件大小	规格书
28页	1181K
描述
Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers

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AD5252BRU50 数据手册

AD5251/AD5252

INTERFACE TIMING CHARACTERISTICS

Guaranteed by design, not subject to production test. See Figure 3 for location of measured values. All input control voltages are

specified with tR = tF = ꢀ.5 ns (10% to 90% of 3 V), and timed from a voltage level of 1.5 V. Switching characteristics are measured

using both V_DD= 3 V and 5 V.

Table 3. Interface Timing and EEMEM Reliability Characteristics (All Parts).

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

INTERFACE TIMING

SCL Clock Frequency

tBUF Bus Free Time between STOP and

START

f_SCL

t₁

400

kHz

µs

1.3

t_HD;STAHold Time (Repeated START)

t₂

After this period, the first clock pulse 0.6

is generated

µs

t_LOWLow Period of SCL Clock

t₃

t₄

t₅

t₆

t₇

t₈

t₉

t₁₀

1.3

0.6

µs

t_HIGHHigh Period of SCL Clock

t_SU;STASetup Time For START Condition

t_HD;DATData Hold Time

0.9

t_SU;DATData Setup Time

100

t_FFall Time of Both SDA and SCL Signals

t_RRise Time of Both SDA and SCL Signals

t_SU;STOSetup Time for STOP Condition

EEMEM Data Storing Time

300

0.6

t_{EEMEM_STORE}

t_{EEMEM_RESTORE1}

300

µs

EEMEM Data Restoring Time at

Power-On¹

V_DDrise time dependent. Measure

without decoupling capacitors at V_DD

and V_SS.

EEMEM Data Restoring Time Upon

t_{EEMEM_RESTORE2}

V_DD= 5 V

300

540

µs

Restore Command or RESET Operation¹

EEMEM Rewritable Time (delay time after t_{EEMEM_REWRITE}

Power On or RESET before EEMEM can

be written)

FLASH/EE MEMORY RELIABILITY

Endurance²

Data Retention³

100

kCycles

Years

100

¹During power-up, all outputs preset to midscale before restoring to the final EEMEM contents. RDAC0 has the shortest, whereas RDAC3 has the longest EEMEM data

restoring time.

²Retention lifetime equivalent at junction temperature T_J= 55°C per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV derates

with junction temperature.

³When the part is not in operation, the SDA and SCL pins should be pulled to high. When these pins are pulled to low, the I²C interface at these pins conducts current of

about 0.8 mA at V_DD= 5.5 V and 0.2 mA at V_DD= 2.7 V.

Rev. 0 | Page 7 of 28

1...4 5 678 9 10...28

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