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AD5172BRM50-R2

更新时间： 2024-02-10 04:53:24
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管转换器电阻器
页数 文件大小 规格书
19页 315K
描述
IC DUAL 50K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO10, 3 X 4.90 MM, MO-187BA, MSOP-10, Digital Potentiometer

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AD5172BRM50-R2 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：3 X 4.90 MM, MO-187BA, MSOP-10针数：10
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.28
其他特性：IT CAN ALSO OPERATE FROM 5 V NOMINAL SUPPLY标称带宽：0.1 kHz
控制接口：2-WIRE SERIAL转换器类型：DIGITAL POTENTIOMETER
JESD-30 代码：S-PDSO-G10JESD-609代码：e0
长度：3 mm功能数量：2
位置数：256端子数量：10
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP10,.19,20封装形状：SQUARE
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3/5 V认证状态：Not Qualified
电阻定律：LINEAR最大电阻容差：20%
最大电阻器端电压：5.5 V最小电阻器端电压：
座面最大高度：1.1 mm子类别：Digital Potentiometers
标称供电电压：3 V表面贴装：YES
技术：CMOS标称温度系数：35 ppm/ °C
温度等级：AUTOMOTIVE端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
标称总电阻：50000 Ω宽度：3 mm
Base Number Matches：1

AD5172BRM50-R2 数据手册

 浏览型号AD5172BRM50-R2的Datasheet PDF文件第4页浏览型号AD5172BRM50-R2的Datasheet PDF文件第5页浏览型号AD5172BRM50-R2的Datasheet PDF文件第6页浏览型号AD5172BRM50-R2的Datasheet PDF文件第8页浏览型号AD5172BRM50-R2的Datasheet PDF文件第9页浏览型号AD5172BRM50-R2的Datasheet PDF文件第10页 
AD5172/AD5173  
Preliminary Technical Data  
ABSOLUTE MAXIMUM RATINGS1  
(TA = +25°C, unless otherwise noted.)  
Table 4.  
Parameter  
Value  
VDD to GND  
–0.3 V to +ꢀ V  
VDD  
VA, VB, VW to GND  
1
IMAX  
20 mA  
Digital Inputs and Output Voltage to GND 0 V to +ꢀ V  
Operating Temperature Range  
Maximum Junction Temperature (TJMAX  
Storage Temperature  
–40°C to +125°C  
)
150°C  
–ꢁ5°C to +150°C  
300°C  
Lead Temperature (Soldering, 10 sec)  
Thermal Resistance2 θJA: MSOP-10  
230°C/W  
NOTES  
1 Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and maximum applied voltage  
across any two of the A, B, and W terminals at a given resistance.  
2 Package power dissipation = (TJMAX – TA)/θJA.  
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and  
functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is  
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
driving capability.  
Serial Clock Input. Positive edge triggered.  
Requires pull-up resistor  
PIN CONFIGURATION  
ꢁ
SCL  
ꢀ
SDA  
Serial Data Input/Output. Requires pull-up  
resistor  
1
2
3
4
5
B1  
A1  
W1  
B2  
10  
9
8
A2  
B2  
A2 Terminal. GND ≤ VA2 ≤ VDD  
B2 Terminal. GND ≤ VB2 ≤ VDD  
W1 Terminal. GND ≤ VW1 ≤ VDD  
8
W2  
GND  
A2  
SDA  
SCL  
7
9
VDD  
6
10  
W1  
Figure 4.- AD5172 Pin Configuration  
Table 6.  
Pin Name Description  
1
2
B1  
B1 Terminal. GND ≤ VB1 ≤ VDD  
1
2
3
4
5
B1  
W1  
B2  
10  
9
AD0  
AD0  
Programmable address bit 0 for multiple  
package decoding. AD0 and AD1 allow  
maximum of four AD51ꢀ3s to be addressed  
8
W2  
GND  
AD1  
SDA  
SCL  
7
3
4
W2  
W2 Terminal. GND ≤ VW2 ≤ VDD  
Digital Ground.  
Positive Power Supply. Specified for operation  
from 2.ꢀ V to 5.5 V. For OTP programming, VDD  
needs to be a minimum of ꢁ V and 100 mA  
driving capability.  
VDD  
6
GND  
Figure 5. – AD5173 Pin Configuration  
5
VDD  
PIN FUNCTION DESCRIPTIONS  
ꢁ
ꢀ
8
SCL  
Serial Clock Input. Positive edge triggered.  
Requires pull-up resistor  
Table 5.  
Pin Name Description  
SDA  
AD1  
Serial Data Input/Output. Requires pull-up  
resistor  
1
2
3
4
B1  
B1 Terminal. GND ≤ VB1 ≤ VDD  
A1 Terminal. GND ≤ VA1 ≤ VDD  
W2 Terminal. GND ≤ VW2 ≤ VDD  
Digital Ground.  
A1  
Programmable address bit 1 for multiple  
package decoding. AD0 and AD1 allow  
maximum of four AD51ꢀ3s to be addressed  
W2  
GND  
9
B2  
B2 Terminal. GND ≤ VB2 ≤ VDD  
W1 Terminal. GND ≤ VW1 ≤ VDD  
Positive Power Supply. Specified for operation  
from 2.ꢀ V to 5.5 V. For OTP programming, VDD  
needs to be a minimum of ꢁ V and 100 mA  
5
VDD  
10  
W1  
Rev. PrF 8/14/03 | Page ꢀ of 19  
1...45678910...19

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