AD5160
TIMING CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS
(VDD = +5V 10%, or +3V 10%ꢀ VA = VDDꢀ VB = 0 Vꢀ –40°C < TA < +125°Cꢀ unless otherwise noted.)
Table 3.
Parameter
Symbol
Conditions
Min Typ1 Max Unit
SPI INTERFACE TIMING CHARACTERISTICS6, 10 (Specifications Apply to All Parts)
Clock Frequency
Input Clock Pulsewidth
Data Setup Time
Data Hold Time
fCLK
tCH, tCL
tDS
25
MHz
ns
ns
Clock level high or low
20
5
5
tDH
ns
CS
tCSS
15
40
0
ns
Setup Time
CS
tCSW
tCSH0
tCSH1
tCS1
ns
High Pulsewidth
CS
CS
ns
CLK Fall to
CLK Fall to
CS
Fall Hold Time
Rise Hold Time
0
ns
10
ns
Rise to Clock Rise Setup
NOTES
1 Typical specifications represent average readings at +25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, Wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of 1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
ꢀ Measured at the A terminal. The A terminal is open circuited in shutdown mode.
8 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
9 All dynamic characteristics use VDD = 5 V.
10 See timing diagram for location of measured values. All input control voltages are specified with tR = tF = 2 ns (10% to 90% of 3 V) and timed from a voltage
level of 1.5 V.
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C, unless otherwise noted.)
Table 4.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
VDD to GND
VA, VB, VW to GND
Value
–0.3 V to +ꢀ V
VDD
1
IMAX
20 mA
Digital Inputs and Output Voltage to GND 0 V to +ꢀ V
Operating Temperature Range
Maximum Junction Temperature (TJMAX
Storage Temperature
–40°C to +125°C
)
150°C
–65°C to +150°C
300°C
Lead Temperature (Soldering, 10 sec)
Thermal Resistance2 θJA: MSOP-10
230°C/W
NOTES
1 Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.
2 Package power dissipation = (TJMAX – TA)/θJA
.
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