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AD28MSP02KR PDF预览

AD28MSP02KR

更新时间： 2024-02-12 22:49:36
品牌 Logo 应用领域
亚德诺 - ADI 消费电路商用集成电路光电二极管
页数 文件大小 规格书
20页 328K
描述
Voiceband Signal Port

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中文翻译

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AD28MSP02KR 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOIC-28
针数：28Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.66商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：R-PDSO-G28JESD-609代码：e0
长度：17.9 mm功能数量：1
端子数量：28最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：220
认证状态：Not Qualified座面最大高度：2.65 mm
最大压摆率：40 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V表面贴装：YES
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：7.5 mmBase Number Matches：1

AD28MSP02KR 数据手册

 浏览型号AD28MSP02KR的Datasheet PDF文件第4页浏览型号AD28MSP02KR的Datasheet PDF文件第5页浏览型号AD28MSP02KR的Datasheet PDF文件第6页浏览型号AD28MSP02KR的Datasheet PDF文件第8页浏览型号AD28MSP02KR的Datasheet PDF文件第9页浏览型号AD28MSP02KR的Datasheet PDF文件第10页 
AD28msp02  
Table III. Control Word Read Format  
Read Request  
15 14  
13  
0
12  
0
11  
0
10  
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
1
0
Read Ready  
15 14  
13  
0
12  
0
11  
0
10  
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
1
1
Control Register Reads  
In the circuit shown in Figure 7, scaling of the analog input is  
achieved by the resistors RIN and RFB. The input signal gain,  
–RFB/RIN, can be adjusted from –12 dB to +26 dB by varying  
the values of these resistors. The AD28msp02’s on-chip 20 dB  
preamplifier can be enabled when there is not enough gain in  
the input circuit; the preamplifier is configured by Bit 0 (IPS) of  
the control register. Total gain must be configured to ensure  
that a full-scale input signal (at CIN in Figure 7) produces a sig-  
nal level at the input to the sigma-delta modulator of the ADC  
that does not exceed VINMAX, which is specified under “Analog  
Interface Electrical Characteristics.” If the total gain is increased  
above unity, signal-to-noise (SNR + THD) performance will  
not meet the listed specifications.  
To read the control register, the host processor must transfer  
two control words. For each transfer, the DATA/CNTRL pin  
must be low when SDIFS is asserted. If the MSB of the bit  
stream is high, the SPORT recognizes the incoming serial data  
as a request for control information. The protocol for reading  
the control register is as follows:  
1. The host processor sends a “Read Request” control word to  
the AD28msp02. Since the MSB of this control word is high,  
the SPORT recognized the incoming serial data as a read re-  
quest and does not overwrite the control register.  
2. When the AD28msp02 receives the read request, it finishes  
any data transfers in progress and waits for a “Read Ready”  
control word.  
C
FB  
3. The host processor then transfers a “Read Ready” control  
word to the AD28msp02. Upon receiving this control word,  
the AD28msp02 transfers the control register contents to the  
host processor via the SPORT.  
VFB  
VIN  
NORM  
NORM  
R
FB  
C
IN  
INPUT  
SIGNAL  
R
IN  
4. When the SPORT completes the control register transfer, it  
immediately resumes transmitting data at an 8 kHz rate.  
VFB  
AUX  
AUX  
MUX  
This scheme allows any data transfers in progress to be com-  
pleted and resolves any ambiguities between data and control  
words. The format for the read control words is shown in  
Table III.  
VIN  
DESIGN CONSIDERATIONS  
Analog Input  
VOLTAGE  
REFERENCE  
The analog input signal to the AD28msp02 must be ac-coupled.  
Figure 7 shows the recommended input circuit for the  
AD28msp02’s analog input pin (either VINNORM or VINAUX).  
The circuit of Figure 7 implements a first-order low-pass filter  
with a 3 dB point at 20 kHz; this is the only filter that must be  
implemented external to the AD28msp02 to prevent aliasing of  
the sampled signal. Since the AD28msp02’s ADC uses a highly  
oversampled approach that transfers the bulk of the anti-aliasing  
filtering into the digital domain, the off-chip anti-aliasing filter  
need only be of low order.  
AD28msp02  
Figure 7. Recommended Analog Input Circuit  
The dc biasing of the analog input signal is accomplished with  
an on-chip voltage reference which nominally equals 2.5 V. The  
input signal must be ac-coupled with an external coupling ca-  
pacitor (CIN). CIN and RIN should be chosen to ensure a cou-  
pling corner frequency of 30 Hz. CIN should be 0.1 µF or larger.  
REV. 0  
–7–  
1...45678910...20

中文翻译

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