AD1989B
Parameter
Min
Typ
Max
Unit
GPIO_0, GPIO_1, and GPIO_2
Input Signal High (VIH)
Input Signal Low (VIL)
DVGPIO × 0.60
DVGPIO
DVGPIO × 0.24
DVGPIO
V
V
V
V
0
Output Signal High (VOH
Output Signal Low (VOL
)
IOUT = –500 μA
IOUT = +1500 μA
DVGPIO × 0.72
0
)
DVGPIO × 0.10
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
S/PDIF-Out_1, S/PDIF-Out_2
–150
–50
nA
μA
Output Signal High (VOH
)
IOUT = –500 μA
IOUT = +1500 μA
DVGPIO × 0.72
0
DVGPIO
DVGPIO × 0.10
V
V
Output Signal Low (VOL
S/PDIF_IN
)
Input Signal High (VIH)
Input Signal Low (VIL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
POWER SUPPLY
DVGPIO × 0.60
0
DVGPIO
DVGPIO × 0.24
V
V
nA
μA
150
–50
Analog (AVDD) 3.3 V ± ±5%
Power Supply Range
Power Dissipation
3.13
2.97
2.97
1.42
2.97
3.30
162
49
3.46
3.63
3.63
1.58
3.63
V
mW
mA
Supply Current
Digital (DVDD) 3.3 V ± 10%
Power Supply Range
Power Dissipation
3.30
241
73
V
mW
mA
Supply Current
Digital I/O (DVIO) 3.3 V ± ±10%
Power Supply Range
Power Dissipation
3.30
0.66
0.20
V
mW
mA
Supply Current
Digital I/O (DVIO) 1.5 V ± ±5.5%
Power Supply Range
Power Dissipation
1.50
0.03
0.20
V
mW
mA
Supply Current
Digital GPIO (DVGPIO) 3.3 V ± ±10%
Power Supply Range
Power Dissipation
3.30
3.63
1.10
80
V
mW
mA
dB
Supply Current
Power Supply Rejection (Reference to fS 100 mV p-p Signal @ 1 kHz)1
1 Guaranteed but not tested.
2 Measurements reflect main ADC.
3 RMS values assume sine wave input.
Rev. 0
|
Page 6 of 20
|
August 2008