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AD1866* PDF预览

AD1866*

更新时间: 2024-01-01 06:52:36
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 254K
描述
Single Supply Dual 16-Bit Audio DAC

AD1866* 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:unknown风险等级:5.38
最大模拟输出电压:1 V最小模拟输出电压:-1 V
转换器类型:D/A CONVERTER输入位码:2'S COMPLEMENT BINARY
输入格式:SERIALJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:10.3 mm
湿度敏感等级:1位数:16
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-35 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
座面最大高度:2.65 mm标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.6 mmBase Number Matches:1

AD1866* 数据手册

 浏览型号AD1866*的Datasheet PDF文件第4页浏览型号AD1866*的Datasheet PDF文件第5页浏览型号AD1866*的Datasheet PDF文件第6页浏览型号AD1866*的Datasheet PDF文件第8页浏览型号AD1866*的Datasheet PDF文件第9页浏览型号AD1866*的Datasheet PDF文件第10页 
Analog Circuit Considerations–AD1866  
AD1866  
16  
V
V L  
B
1
L
+
5V  
LL  
V
S
V
R
2
15  
14  
13  
O
+5V  
V
L
O
+
5V  
V
L
3
DL  
O
V
L
O
CLK  
NRL  
4
5
6
7
AGND  
FALSE GROUND  
(2.5V)  
DR  
LR  
12  
11  
10  
+5V  
NRR  
V
R
O
+
5V  
DGND  
V
R
O
V
R
V
R
V
8
9
O
B
S
V
L
O
Figure 8b. Circuitry Using Voltage Biases  
D ISTO RTIO N P ERFO RMANCE AND TESTING  
Figure 8a. Schem atic Using False Ground  
T he T HD+N figure of an audio DAC represents the amount of  
undesirable signal produced during reconstruction and play-  
back of an audio waveform. T herefore, the T HD+N specifica-  
tion provides a direct measure to classify and choose an audio  
DAC for a desired level of performance. Figure 1 illustrates the  
typical T HD+N versus frequency performance of the AD1866.  
It is evident that the T HD+N performance of the AD1866 re-  
mains stable at all three amplitude levels through a wide range  
of frequencies. A load impedance of at least 2 kis recom-  
mended for best T HD+N performance.  
Figure 8a illustrates the traditional approach used to generate  
false ground voltages in single supply audio systems. T his cir-  
cuit requires additional power and circuit board space.  
T he AD1866 eliminates the need for “false ground” circuitry.  
VBR and VBL generate the required bias voltages previously  
generated by the “false ground.” As shown in Figure 8b, VBR  
and VBL may be used as the reference point in each output  
channel. T his permits a dc coupled output signal path. T his  
eliminates ac coupling capacitors and improves low frequency  
performance. It should be noted that these bias outputs have  
relatively high output impedance and will not drive output cur-  
rents larger than 100 µA without degrading the specified  
performance.  
Analog Devices tests all AD1866s on the basis of T HD+N per-  
formance. During the distortion test, a high speed digital pat-  
tern generator transmits digital data to each channel of the  
device under test. Sixteen-bit data is latched into the DAC at  
352.8 kHz (8 × FS). T he test input code is a digitally encoded  
990.5 Hz sine wave with 0 dB, –20 dB, and –60 dB amplitudes.  
A 4096 point FFT calculates total harmonic distortion + noise,  
signal-to-noise ratio, and D-range. No deglitchers or external  
adjustments are used.  
REV. 0  
–7–  

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