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AD1857JRSZRL

更新时间： 2024-01-29 21:59:20

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	265K
描述
IC SPECIALTY CONSUMER CIRCUIT, PDSO20, SSOP-20, Consumer IC:Other

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AD1857JRSZRL 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	SSOP-20	针数：	20
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.7
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	R-PDSO-G20
JESD-609代码：	e3	长度：	7.2 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	20	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.98 mm
最大压摆率：	65 mA	最大供电电压 (Vsup)：	5.25 V
最小供电电压 (Vsup)：	4.75 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	40	宽度：	5.3 mm
Base Number Matches：	1

AD1857JRSZRL 数据手册

AD1857/AD1858

P IN LIST

D igital Audio Ser ial Input Inter faces

P in Nam e

Num ber

I/O

D escription

SDAT A

Serial input, MSB first, containing two channels of 16, 18 or 20 bits (AD1857) or

16 bits (AD1858) of twos complement data per channel.

BCLK

Bit clock input for input data. Need not run continuously; may be gated or used in a

burst fashion.

LRCLK

Left/right clock input for input data. Must run continuously.

MODE

Input serial data port mode control. Selects between I²S-justified (HI) and left-justified

(LO) on the AD1857. Selects between DSP serial port style mode (HI) and right-

justified (LO) on the AD1858. The state of the mode pin should be changed only when

the AD1857/AD1858 is held in reset (PD/RST LO). Otherwise, the AD1857/

AD1858 serial port may lose synchronism.

Contr ol and Clock Signals

P in Nam e

Num ber

I/O

D escription

PD/RST

Power-Down/Reset. T he AD1857/AD1858 are placed in a low power consumption

“sleep” mode when this pin is held LO. T he AD1857/AD1858 are reset on the

rising edge of this signal. Connect HI for normal operation.

DEEMP

De-emphasis. Digital de-emphasis is enabled when this input signal is HI. T his is

used to impose a 50/15 µs response characteristic on the output audio spectrum at

an assumed 44.1 kHz sample rate.

MUT E

MCLK

Mute. Assert H I to mute both stereo analog outputs of the AD1857/AD1858.

Deassert LO for normal operation.

Master Clock Input. Connect to an external clock source at either 256 or 384 times

the intended sample frequency as determined by the 384/256 pin. Must be synchro-

nous with LRCLK, but may have any phase with respect to LRCLK.

384/256

Selects the master clock mode as either 384 times the intended sample frequency

(H I) or 256 times the intended sample frequency (LO). T he state of this input

should be hardwired to logic LO or logic HI or may be changed while the AD1857/

AD1858 is in power-down/reset. It must not be changed while the AD1857/AD1858

is operational.

Analog Signals

P in Nam e

Num ber

I/O

D escription

FILT

Voltage Reference Filter Capacitor Connection. Bypass and decouple the voltage

reference with parallel 10 µF and 0.1 µF capacitors to the AGND pin.

CMOUT

Voltage Reference Common Mode Output. Should be decoupled with 10 µF

capacitor to the AGND pin or plane. T his output is available externally for dc

coupling and level-shifting. CMOUT should not have any signal dependent load,

or used where it will sink or source current.

OUT L

OUT R

Left channel line level analog output.

Right channel line level analog output.

P ower Supply Connections and Miscellaneous

P in Nam e

Num ber

I/O

D escription

AV_DD

AGND

DV_DD

DGND

N/C

7, 14

9, 12

Analog Power Supply. Connect to analog +5 V supply.

Analog Ground.

Digital Power Supply. Connect to digital +5 V supply.

Digital Ground.

No Connect. Reserved. Do not connect.

REV. 0

–5–

1 2 3 456 7 8...16

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型号	品牌	描述	获取价格	数据表
AD1858	ADI	Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs	获取价格
AD1858_15	ADI	Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs	获取价格
AD1858JRS	ADI	Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs	获取价格
AD1858JRSRL	ADI	Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs	获取价格
AD1859	ADI	Stereo, Single-Supply 18-Bit Integrated DAC	获取价格
AD1859JR	ADI	Stereo, Single-Supply 18-Bit Integrated DAC	获取价格

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