Stereo, Single-Supply
18-Bit Integrated ⌺⌬ DAC
a
AD1859
P RO D UCT O VERVIEW
FEATURES
T he AD1859 is a complete 16-/18-bit single-chip stereo digital
audio playback subsystem. It comprises a variable rate digital
interpolation filter, a revolutionary multibit sigma-delta (∑∆)
modulator with dither, a jitter-tolerant DAC, switched capacitor
and continuous time analog filters, and analog output drive cir-
cuitry. Other features include an on-chip stereo attenuator and
mute, programmed through an SPI-compatible serial control
port.
Com plete, Low Cost Stereo DAC System in a Single Die
Package
Variable Rate Oversam pling Interpolation Filter
Multibit ⌺⌬ Modulator w ith Triangular PDF Dither
Discrete and Continuous Tim e Analog Reconstruction
Filters
Extrem ely Low Out-of-Band Energy
64 Step (1 dB/ Step) Analog Attenuator w ith Mute
Buffered Outputs w ith 2 k⍀ Output Load Drive
Rejects Sam ple Clock J itter
94 dB Dynam ic Range, –88 dB THD+N Perform ance
Option for Analog De-em phasis Processing w ith
External Passive Com ponents
؎0.1؇ Maxim um Phase Linearity Deviation
Continuously Variable Sam ple Rate Support
Digital Phase Locked Loop Based Asynchronous Master
Clock
On-Chip Master Clock Oscillator, Only External Crystal
Is Required
T he key differentiating feature of the AD1859 is its asynchro-
nous master clock capability. Previous ∑∆ audio DACs re-
quired a high frequency master clock at 256 or 384 times the
intended audio sample rate. T he generation and management
of this high frequency synchronous clock is burdensome to the
board level designer. T he analog performance of conventional
single bit ∑∆ DACs is also dependent on the spectral purity of
the sample and master clocks. T he AD1859 has a digital Phase
Locked Loop (PLL) which allows the master clock to be asyn-
chronous, and which also strongly rejects jitter on the sample
clock (left/right clock). T he digital PLL allows the AD1859 to
be clocked with a single frequency (27 MHz for example) while
the sample frequency (as determined from the left/right clock)
can vary over a wide range. T he digital PLL will lock to the
new sample rate in approximately 100 ms. Jitter components
15 Hz above and below the sample frequency are rejected by
6 dB per octave. T his level of jitter rejection is unprecedented
in audio DACs.
Pow er-Dow n Mode
Flexible Serial Data Port (I2S-J ustified, Left-J ustified,
Right-J ustified and DSP Serial Port Modes)
SPI* Com patible Serial Control Port
Single +5 V Supply
28-Pin SOIC and SSOP Packages
APPLICATIONS
Digital Cable TV and Direct Broadcast Satellite Set-Top
Decoder Boxes
Digital Video Disc, Video CD and CD-I Players
High Definition Televisions, Digital Audio Broadcast
Receivers
CD, CD-R, DAT, DCC, ATAPI CD-ROM and MD Players
Digital Audio Workstations, Com puter Multim edia
Products
T he AD1859 supports continuously variable sample rates with
essentially linear phase response, and with an option for external
analog de-emphasis processing. T he clock circuit includes an
on-chip oscillator, so that the user need only provide an external
crystal. T he oscillator may be overdriven, if desired, with an ex-
ternal clock source.
(continued on page 7)
FUNCTIO NAL BLO CK D IAGRAM
CONTROL
DATA
REFERENCE
FILTER AND
GROUND
DIGITAL
SUPPLY
ASYNCHRONOUS
CLOCK/CRYSTAL
INPUT
2
3
2
DPLL/CLOCK
MANAGER
DE-EMPHASIS
SWITCH LEFT
SERIAL
CONTROL
INTERFACE
VOLTAGE
REFERENCE
AD1859
COMMON MODE
MULTIBIT
ANALOG
FILTER
VARIABLE RATE
INTERPOLATION
ATTEN/
OUTPUT
BUFFER
DAC
DAC
∑∆ MODULATOR
MUTE
SERIAL
DATA
INTERFACE
16- OR 18-BIT
DIGITAL DATA
INPUT
6
ANALOG
OUTPUTS
MULTIBIT
∑∆ MODULATOR
ANALOG
FILTER
VARIABLE RATE
INTERPOLATION
ATTEN/
MUTE
OUTPUT
BUFFER
DE-EMPHASIS
SWITCH RIGHT
2
DE-EMPHASIS
MUTE
ANALOG
SUPPLY
POWER
DOWN/RESET
*SPI is a registered trademark of Motorola, Inc.
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norw ood. MA 02062-9106, U.S.A.
Tel: 617/ 329-4700 Fax: 617/ 326-8703
5秒后页面跳转
全球首块英伟达H200交付 黄仁勋“送货上门”
常用8脚开关电源芯片型号大全
74HC04芯片引脚图及功能、应用电路图讲解
CR6842芯片参数、引脚配置、应用电路图详解
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
技术参数
数据手册
如果您发现信息不准确，
